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About DIFF100 net in Lesson7
Hello Robert.
I have just finished Lesson7 on the Schematic and PCB Design Course. When I route the DIFF100 net in the iMX53 DDR Layout document, I find that the unrouted tracks are configured to have a width much more bigger than the indentical tracks on the memory modules that are already routed. Why is this happening? It is ok or I have to change something?
Thank you in advance.
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