About solder mask clearance and track width

[mulfycrowh]

Hi everyone,

On the screenshot attached we see two problems:

1/ The pitch between the pins of the IC is so small that the clearance between the solder masks is smaller than the clearance defined in the rules: 0,254 mm.
2/ The track width is bigger than the pin itself.

My questions:
A/ How do I remove the solder mask clearance warning? Can I remove the warning for that IC only or should I set the clearance (for all the pcb) to something smaller or equal to the smallest one on the pcb?
B/ Track width is bound to impedance. How would you manage the warning without changing the track width?

Thanks!

[WhoKnewKnows]

The pink rings around the IC pads illustrate how far beyond the IC pad copper the solder mask will be pushed from the pad. The opening in the solder mask is actually the pad + the pink ring. If you click on the solder mask layer it will take priority over the bottom (blue) layer and you'll see it's entirety. Usually you need the opening in the solder mask to be slightly larger than the pad, so that variations in positioning of the pad to the hole in the solder mask won't significantly block your ability to solder a pin to the pad. If you go into a component's footprint, you can set each pad's solder mask to follow a rule, or to follow a manual setting. If you reduce the solder mask opening around each pad, whether by rule or manual setting, it allows the solder mask web between the pads to be large enough so that it meets the minimum width and you don't get the error indications. You could also go into the rules that set the minimum solder mask web width narrower, if your PCB manufacturer is capable of it, or if they don't charge extra money for that.

[mulfycrowh]

My PCB manufacturer shared a track width of 0.39 mm for an impedance of 50 Ohm.
The problem is that this width is larger than the pins of several ICs.
How can I manage it ?

[WhoKnewKnows]

Saturn PCB has a pretty good tool/calculator for this. You can enter the values you are currently using for your design and see what the resulting impedance is. Generally, for a surface trace's given impedance, caused by trace width, dielectric thickness (trace's separation from reference plane) and emissivity, reducing the dielectric thickness allows narrowing of the trace, assuming the dielectric material's emissivity stays constant.

Altium has tools for working with this, and then using the results to drive routing rules.

Perhaps Fedevel Academy offers courses on this?

[mulfycrowh]

WhoKnewKnows Thanks for reply.
I know Saturn PCB.
Now the question is: can we have tracks larger than the pins?
Usually no.

[mulfycrowh]

I do not understand this value of 0.39 mm. That's really big.
As Robert mentioned in his courses, standard width is 0.2 mm.

[WhoKnewKnows]

Since you know the Saturn PCB tool, you should be able to use it to see how you can reduce the width of the traces. As mentioned, if you decrease the thickness of the dielectric between the surface trace and the reference plane, then the surface trace can be narrower and maintain the same impedance. There is no standard trace width for a certain impedance, although 0.2mm is common for controlled impedance and high speed designs.

[mulfycrowh]

I don't want to make the calculation by myself, fearing using wrong material or inducing higher prices.
I am waiting for the manufacturer's reply.

[WhoKnewKnows]

Seems like you should invite your PCB manufacturer to this conversation.

[robertferanec]

1) In rules set Minimum Solder Mask Sliver (many manufacturers can do 0.1mm, some can go as low as 0.05mm). Then you also you may need to adjust the mask around pads, go to footprint, select the pads and adjust Solder mask expension





2) I would just start with tracks of the same width as PAD and when possible (when there is more space) I would make it wider.