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About vias on differential pairs

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  • About vias on differential pairs

    Hi,

    Changing the layer when routing a differential pair implies very close vias.
    They trigger a clearance violation, here 0.07 mm on the attached screenshot.
    Is it possible to get rid of this violation without changing the rule ?

    Thanks



  • #2
    It seems to me that it is the "solder mask sliver" rule.
    Up to now, I have always ignored this rule and had the PCB fabricator handle it.
    For via's you can also set a negative solder mask expansion.

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    • #3
      qdrives
      Senior Member
      qdrives is right. PS: I almost always use masked (tented) VIAs.

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