About vias on differential pairs

[mulfycrowh]

Hi,

Changing the layer when routing a differential pair implies very close vias.
They trigger a clearance violation, here 0.07 mm on the attached screenshot.
Is it possible to get rid of this violation without changing the rule ?

Thanks

[qdrives]

It seems to me that it is the "solder mask sliver" rule.
Up to now, I have always ignored this rule and had the PCB fabricator handle it.
For via's you can also set a negative solder mask expansion.

[robertferanec]

qdrives is right. PS: I almost always use masked (tented) VIAs.