Hi Robert,
I am curious about something which I want to learn if it is recommended or not in schematic designs.
I created the schematic in your Altium essentials second edition course. In the schematic, there are some power nets that I wanted to use netlabel instead of drawing the line as attachments. The OUT1 pin of the chip is connected to both the voltage divider circuit and to the OUTPUT 1 Circuit. I want to make these connections with the netlabel which I can name as "OUT1". However, the net is also connected to the "+1V5" power port. So if I make a netlabel named "OUT1", does it make any problem in compiling? Is that a recommended structure? If not, what are the recommended methods in such situations?
Thanks,
Oğuz
I am curious about something which I want to learn if it is recommended or not in schematic designs.
I created the schematic in your Altium essentials second edition course. In the schematic, there are some power nets that I wanted to use netlabel instead of drawing the line as attachments. The OUT1 pin of the chip is connected to both the voltage divider circuit and to the OUTPUT 1 Circuit. I want to make these connections with the netlabel which I can name as "OUT1". However, the net is also connected to the "+1V5" power port. So if I make a netlabel named "OUT1", does it make any problem in compiling? Is that a recommended structure? If not, what are the recommended methods in such situations?
Thanks,
Oğuz
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