About new width rule in AD 21

[qdrives]

One thing I once did to restore a zoom-all issue was Design / Netlist / Clean all nets.
Another thing to check Right click on the track within the room and select Applicable unary rules.
Also, you may want to change the rule to "TouchesRoom" and not use "WithinRoom". There is a slight, but crucial difference between them.

[qdrives]

Part of the problem is that Altium also has track width and via properties tied to each net. If you go to the netlist editor and edit a net, you will also see this information.
Good thing is that it remembers what you last did for that net. The bad thing is that it better remembers the wrong settings 😣

[mulfycrowh]

Usually in other projects preferred via is applied.
I also kindly remind that the width rule under BGA doesn't work anymore...
There is an issue but where ?

[mulfycrowh]

Here attached the Design Rules Check

[robertferanec]

Preferred via size doesn't have to be automatically applied .... that is normal behavior. Maybe this video can help: https://youtu.be/IFLviz722ws

[robertferanec]

Maybe try to check Tools -> Design Rules check -> Rules to Check and be sure the rules you are using are enabled

[mulfycrowh]

The preferred via size is described in Design rules : 0.45/0.2.
Why is this configuration not suggested when I press * ?

[mulfycrowh]

robertferanec AD21 is acting as if there weren't any design rule

[robertferanec]

I don't use VIA rules - I am not sure what are your settings. But you can simply change the default VIA - when placing a via, press tab, change the hole size and the next time when you are placing a via it should remember the new settings. Possibly, in Preferences, there are all the defaults.

[mulfycrowh]

I also have something strange: when I click on Design > Import changes from ..., it replaces the name of the room under the BGA with the name of a sheet...
So I delete the room and create again the room under the BGA with the correct name

[mulfycrowh]

[mulfycrowh]

As you can see, AD21 turned crazy: when I place a via, it places a via with a hole bigger than the ring !!!!
It doesn't follow the design rules anymore...
I didn't touch anything

[mulfycrowh]

I wrote one new rule to apply under the BGA: I used WithinRoom and it worked to have the track width modified.
Now it doesn't work anymore.
It is not a matter of priority: I disabled both other rules (power, single): same result.
I have the room under BGA.

Any idea maybe?

[qdrives]

robertferanec Yes, HasFootprint still works, but in your video you essentially specify that the clearance on layer L1 and the footprint is 0.1mm. So between copper (track, arc, fill, etc.) and the footprint. See also my discussion on clearance table here: https://designhelp.fedevel.com/forum...9426#post19426

However, here mulfycrowh wants to change the line width. So you cannot 'compare' the trace to the footprint. Trace width is a unary rule (only one object) while clearance is a binary rule (between two objects).

Another problem is where do you want the thinner traces to start/stop? Underneath it, or just before it? With a room you are able to define that.

[mulfycrowh]

robertferanec Thank you Robert