About new width rule in AD 21

[mulfycrowh]

Hi everyone,

I would like to change the track width under a BGA.
I created the new attached rule.
The footprint name is BGA6CP40...
But it doesn't work: the width doesn't change.
The general width is 0.25mm and I would like to get 0.21mm.
Thanks for help.

[qdrives]

A trace does not have a footprint.
What you could do is place a room over the BGA and change to rule with "TouchesRoom('RoomName')" or "WithInRoom('RoomName')"

[mulfycrowh]

Thanks.
I meant when the track is over the footprint.
I guess it is not possible without using a room.

[robertferanec]

This may also help: Altium Tutorial - Smaller clearance under BGA or Footprint: https://youtu.be/B8wQVrPKTSw

But I guess, it doesn't work anymore? I am not sure, if that rule is not only working directly under the footprint now (e.g. L1 if the component is on the top). I moved to rooms.

[mulfycrowh]

robertferanec Thank you Robert

[qdrives]

robertferanec Yes, HasFootprint still works, but in your video you essentially specify that the clearance on layer L1 and the footprint is 0.1mm. So between copper (track, arc, fill, etc.) and the footprint. See also my discussion on clearance table here: https://designhelp.fedevel.com/forum...9426#post19426

However, here mulfycrowh wants to change the line width. So you cannot 'compare' the trace to the footprint. Trace width is a unary rule (only one object) while clearance is a binary rule (between two objects).

Another problem is where do you want the thinner traces to start/stop? Underneath it, or just before it? With a room you are able to define that.

[mulfycrowh]

I wrote one new rule to apply under the BGA: I used WithinRoom and it worked to have the track width modified.
Now it doesn't work anymore.
It is not a matter of priority: I disabled both other rules (power, single): same result.
I have the room under BGA.

Any idea maybe?

[mulfycrowh]

As you can see, AD21 turned crazy: when I place a via, it places a via with a hole bigger than the ring !!!!
It doesn't follow the design rules anymore...
I didn't touch anything

[mulfycrowh]

[mulfycrowh]

I also have something strange: when I click on Design > Import changes from ..., it replaces the name of the room under the BGA with the name of a sheet...
So I delete the room and create again the room under the BGA with the correct name

[robertferanec]

I don't use VIA rules - I am not sure what are your settings. But you can simply change the default VIA - when placing a via, press tab, change the hole size and the next time when you are placing a via it should remember the new settings. Possibly, in Preferences, there are all the defaults.

[mulfycrowh]

robertferanec AD21 is acting as if there weren't any design rule

[mulfycrowh]

The preferred via size is described in Design rules : 0.45/0.2.
Why is this configuration not suggested when I press * ?

[robertferanec]

Maybe try to check Tools -> Design Rules check -> Rules to Check and be sure the rules you are using are enabled

[robertferanec]

Preferred via size doesn't have to be automatically applied .... that is normal behavior. Maybe this video can help: https://youtu.be/IFLviz722ws