Adding Jumper CAP

[allee.khaan]

Hi robertferanec
I have a quick question regarding Jumper CAPS. How I can add jumper CAPS along with the header pins so they add up automatically in the BOM. I created the symbol and added in the schematic but it gives me an error that the footprint is not found. How I can ignore or resolve this DRC error?
Thanks

[qdrives]

That is why I mentioned option 2 - allowing multiple names by setting the project options to "no report". Project / Project Options -> tab error reporting -> Section violation associated with nets -> Net with multiple names.
Use the navigator to do a proper review before starting (and finishing) layout.

[qdrives]

You could set the component type to mechanical: https://www.altium.com/documentation...art-properties
I personally also have the jumper in 3D, so I need the footprint.

[allee.khaan]

qdrives

Thanks for your reply. It resolved that issue. I am also facing some other issues if you can help me to sort them out.

1. I have a hierarchal design and I want to connect the port with a netlabel in the local sheet but it does not connect and gives me an error that the netlabel is single pins(Details
   
   Net PA_PDO_0 has only one pin (Pin Q25-1))
2. The second error, I have to connect the port with different netlabels in sheet symbols but it gives me an error of multiple names(Details
   
   Nets Wire PB_ISENSE_VOUT has multiple names )

Thanks for your help

[qdrives]

1. If the sheet entry in high level sheet is not connected, then the pin in the lower level sheet my give the warning message that only one pin is connected. Have you synchronized the sheet symbol? Right click on the component -> Sheet symbol actions -> Synchronize sheet entries and ports.
2. Often, the net name for the higher level sheet should be <portname>_<designator of sheetsymbol>. Yes, I know, annoying. Also make sure that Project / Project options -> Options tab -> Net list options box -> Higher level names take priority is checked.

[allee.khaan]

Hi,

1. In this sheet, there is only one port and the same netlabel as shown in the picture.
   
   I added sheet entries as shown in the picture below
   
2. The second error is about different netlabel names and ports. How we can resolve them?
   

[qdrives]

1. For the first you have two options:
a) Beside connecting a port to a net, also give the net a netname.
b) Make sure that Project / Project options -> Options tab -> Net list options box -> allow ports to name nets.
I myself use option A as seen in the picture below (Sens_PhaseU)

2. See the example in the picture below. There is an underscore (_) between the signal name (like Phase) and symbol name (PhaseU in this case)


One other note: for new questions it is better to start a new thread.

[allee.khaan]

I create a new post. Thanks for all your help.
The first issue has been resolved. Still need help for the 2nd. I create a new post for that.

[qdrives]

Actually, I just noted that you are connecting VIN_3V3 (sheet entry) via VIN_3V3 (wire / net name) to I_SENSE2_P (sheet entry).

That way, you will get the warning message. Here too are three options:
1) Give all the same name (not always possible)
2) Disable the multiple names warning in general (not the best solution).
3) Place a No ERC marker on the net. Place / Directives / Generic No ERC -> Select Violation types and check the Nets with multiple names box.

[allee.khaan]

I have so many warnings because of connecting different ports with other ports' names. In this way, I have to place ERC on all these ports.
I hope it will not cause disconnecting ports with each other by just ignoring warnings.
BTW, Thanks for all your help. I really appreciate it.

[qdrives]

That is why I mentioned option 2 - allowing multiple names by setting the project options to "no report". Project / Project Options -> tab error reporting -> Section violation associated with nets -> Net with multiple names.
Use the navigator to do a proper review before starting (and finishing) layout.