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track spacing constraint for high speed tracks

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  • robertferanec
    replied
    yes, exactly. for example you can build prototype with a quick PCB manufacturer and you can do mass production in china where every time they can send to manufacture your pcb to a different pcb manufacturer (often a "virtual" pcb manufacturer just re-send your job to one of the real pcb manfacturers from their list - so you never really know who actually manufactured your PCB). Every PCB manufacturer has their own favorite and stocked materials and if you would like to keep price of your PCB low, they will use it, but in that case they will need to adjust your stackup slightly - that will change requirements for the 50OHM track width and they will need to adjust width of all your impedance controlled tracks (including 50OHM tracks). So it is useful to route your tracks as wide as possible so they have a lot of space to manipulate the track width and make them smaller in the final PCB.

    You don't want them to find out, that they will need to make your tracks wider to meet 50OHM impedance for that specific materials and stackup they are using - because then it will make the clearance too small which can increase crosstalk or it may not even be possible to manufacture your PCB.

    I am not sure if that is an "elite" approach, just practical from experience when changing PCB manufacturers.

    PS: Also, this way you can start routing your PCB even if you don't have the final stackup yet.

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  • gyuunyuu1989
    replied
    I was expecting there to be some sort of Wizard to deal with this but once I read your answer I realized that there is a completely different way to deal with this.

    Do you mean that since different PCB houses will have different materials and dielectric thicknesses, the high speed track width will not to be adjusted and using a higher value when we do the actual layout, leaves open a possibility that we can always make them thinner later?

    Is this how "elite" designers also approach this strange problem?

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  • robertferanec
    replied
    Personally, I would not recommend to leave the track width decision on Altium - for multiple reasons.

    This is what we often do: for all the tracks we need to have 50OHMs we set the biggest gap and track width we can use in our design e.g. in inner layers we often use 0.1mm track width and 0.1mm clearance. We route the whole board and once it is finished, we select all 50OHM tracks and make the width smaller (e.g we change it to 0.075mm) to meet 50OHM impedance width specified by PCB manufacturer. This way you have much more flexibility to manufacture your PCB in different PCB houses - they can adjust the track width based on stackup (e.g. they can easily change your 50OHM tracks to have width 0.09 or 0.085 ... depends on who is building your pcb). Also, this way the clearance will be always at least 0.1mm ... or more.

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  • track spacing constraint for high speed tracks

    The width of high speed tracks that need impedance control is calculated and assigned by Altium designer automatically depending on the impedance profile attributes. Due to laws of physics, the width of the track will change when it moves to different tracks as it is routed. This means that any constraint that is specifiying the distance between these high speed tracks and other tracks will have to adjust itself for the different layers of the PCB.

    From what I know, we specify a fixed value in the constrain window for gap between difference PCB traces. How does one tell Altium to use a "dynamic" value instead based on the width of the track resulting from impedance profile based calculation?

    This question is about the electrical clearance PCB rule, the value that we specify for clearance will not remain same throughout the net but change depending on what layer the track is on.
    Last edited by gyuunyuu1989; 05-19-2022, 03:40 PM.
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