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Thermal vias and net antennae violation

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  • Thermal vias and net antennae violation

    Hi everyone,

    Is it possible to deactivate the net antennae violation for the vias that are used as thermal vias ?


  • #2
    I am particularly speaking about those 9 vias declared as Net Antennae by AD.
    They don't have any connection with any other layer.


    • #3
      Since I want the Net Antennae rule applied to 'All' except for those 9 vias, I wrote the following Custom Query:

      Not(IsVia AND InNet('NetD35_A'))

      Is it a good approach ?


      • #4
        If the vias do not connect to any other layer, then they are NOT thermal vias - the heat has nowhere to go.
        If you place another copper area on another layer to extend the heat, preferably the other outer layer, then they are thermal vias as the heat has somewhere to go.

        As for the rule - I would suggest to:
        - Give the net a specific name and not the auto generated NetD35_A. This makes the rule work correctly even with renumbering, etc.
        - Add a room over the area
        - Not(IsVia And InNet('...') And WithinRoom('...'))
        This would flag net antenna via in that net but outside the room (area)


        • #5
          I agree with qdrives. What Altium is showing you, that actually really is an error which you may want to fix. It is telling you, that these vias are not connected anywhere and you may need to connect them for example to a plane. If you only keep there the vias like that, then they are a kind of useless.


          • #6
            I get similar behavior from Altium. Try drawing traces from one via to the next to join them all together as a means of troubleshooting, not necessarily a permanent fix. Net antenna flags usually appear on objects in a net that have no traces connecting them, or on traces that leave an object in a net and don't make a connection to another object in the net and go beyond a certain distance. In this case, for some reason Altium seems to think these vias need traces on them. It's not a single pin net, because you've got other components' pads on the same polygon/region.

            On some designs, when I shelve a polygon, usually serving as a ground plane and I get it out of my way to make the design easier to work with, all of the vias that only connect to that polygon will immediately show the net antenna flag. The net antenna flags are huge and annoying, so I clear all violations from the design view VS turning off some level of checking (for fear of forgetting to enable it later). If all of the vias' net antennae are showing, and I un-shelve the polygon, usually the vias' net antennae error markers disappear. Perhaps try shelving the polygon and then unshelving? If it's not a polygon, like a region, try converting it to a polygon.

            Keep in mind, net antenna checking can be enabled on-line(continuously checking as you work), or in batch mode (only checked when you run the DRC dialog). If only enabled in batch mode, something you do may correct the violation, but the error indicator may not change status until the next DRC run from the DRC dialog.

            Hope this helps.


            • #7
              The image appears to only show one of the design's copper layers, likely bottom layer. Is there an object on another layer that also belongs to this net? If so, you're going to need a via to make that connection. Altium may think you intend to use one of these 9 vias to connect to that other object.

              I'm wary of creating rules to reduce the occurrence of violations. Typically, if Altium flags something as a violation and I am willing to accept it as is, I'll create an exception to the violation (in the message pane, right click on the violation of concern). Then Altium knows not to bug you about that specific violation.

              Good luck 🤞