Announcement

Collapse
No announcement yet.

Rigid-flex substack violation

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts

  • Rigid-flex substack violation

    Hello colleagues! I have a violation in Altium.
    I'm working on a rigid-flex PCB project that another colleague made before me. The rigid part has 8 layers, the flexible part has a total of 4 layers. Each individual loop has 2 layers. The different flex parts are separated by an air gap. Previously, the stack was formed incorrectly and was missing layers of coverlay, adhesive, and air gap. I changed the stack to the correct one but got an error. Altium give me a violation at the fact that the lower substack intersects with copper from the upper flexible substack.

    I tried to fix the error like this:
    Since altium refers to the intersection of the polyregion from the multi-layer to the track on the middle layer 2 (EVEN THAT THIS IS A POLYGON AND NOT A TRACK), I excluded it from the rule.
    "All and not OnLayer('Multi-layer')"
    This helped, and the error went away, but other scopes broke and altium started to fill polygons closely and without gap to other polygons, paths, vias, pads, etc.
    I tried referring to the stack in some way and that didn't work either. (akp - main is a name of a board regions)
    "All AND (((NOT InLayerStackRegion('AKP','AKPLOW','AKPUP','MAIN')) and (not IsVia)))"
    This also only worked for one error, but other rule fields were broken. Changing the parameters of the gaps between the components also did not work.
    I also tried to exclude vias, pads and polygons from the new rule, but this is also not a matter of effect.
    A separate project was also created, in which a PP was created from scratch for 8 layers and several flexible-rigid sections. Subject to the presence and absence of changes to the rules originally set by Altium itself, no errors occurred during the interaction of flexible layers.
    After changing the hatched polygon to solid, the error remains, but only one or two exactly at the border of the stacks, as shown in the screenshot below.

    Click image for larger version

Name:	12.png
Views:	35
Size:	10.0 KB
ID:	21369

    Click image for larger version

Name:	123.jpg
Views:	24
Size:	73.1 KB
ID:	21370
    Click image for larger version

Name:	123456.jpg
Views:	25
Size:	79.9 KB
ID:	21371
    Click image for larger version

Name:	1234.jpg
Views:	23
Size:	79.1 KB
ID:	21372
    Click image for larger version

Name:	1234567.jpg
Views:	22
Size:	246.6 KB
ID:	21373
    Click image for larger version

Name:	12345.jpg
Views:	22
Size:	260.0 KB
ID:	21374


    Click image for larger version

Name:	1.png
Views:	22
Size:	252.3 KB
ID:	21376

    Attached Files

  • #2
    I have never tried this kind of stackup, but to quickly fix this I would probably just add prepreg between these two flex PCBs (just to make Altium happy) and for production documentation, I would draw the stackup definition separately (e.g. on Manufacturing notes layer).

    Comment

    Working...
    X