Hi everyone,
I'm trying to develop the footprint for this IC: TPS6120x. But the Exposed thermal pad is a little bit weird. I attached you a screenshot:
1º.- The holes are vias, the problem is the four flanges. Does anyone have any suggestion?
2º.- And I have another question. Texas Instruments usually uses the kind of pads that are rounded on one side and squared on the other side. I always substitute these ones by a squared one. Do you think is a good option?
Best regards.
I'm trying to develop the footprint for this IC: TPS6120x. But the Exposed thermal pad is a little bit weird. I attached you a screenshot:
1º.- The holes are vias, the problem is the four flanges. Does anyone have any suggestion?
2º.- And I have another question. Texas Instruments usually uses the kind of pads that are rounded on one side and squared on the other side. I always substitute these ones by a squared one. Do you think is a good option?
Best regards.
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