Altium create strip trace for a simple RF CPWG design?

[iluvu]

I'm trying to design a simple RF circuit and this will be my first RF design with big SMD parts and trace width, in past I've designed Microstrip for small chip antenna which I had good success in getting matched traces.
I'm trying to follow this document and use a 50mil trace width with 12mil clearance where the maximum PAD size I've is 64mil. This time I'm finding it very hard to put a Microstrip trace without getting DRC errors. I need to get the PCB traces as shown in the figure-2 (page 5) of above document.
I've read some guides to use Net ties or may be change DRC rules but there is no definitive guide or minimal guide.
Could anyone please guide me with quick simple steps.
Thanks

[robertferanec]

Please, can you attached screenshots of your PCB? Just to see where are you getting the errors and what you are trying to achieve.

PS: You may need to double check the Er of dielectricum inside your PCB. Er influences impedance, so it may influence your track width. In the document they refer to FR-4, but it doesn't have to be the material used in your PCB house.

[iluvu]

Please, can you attached screenshots of your PCB? Just to see where are you getting the errors and what you are trying to achieve.

PS: You may need to double check the Er of dielectricum inside your PCB. Er influences impedance, so it may influence your track width. In the document they refer to FR-4, but it doesn't have to be the material used in your PCB house.

Hi Robert,

Thanks for the reply!

Sorry, was very busy for last few days. The errors appear when I tried to make symmetric trace to put attenuating passives (like shown in the figure-2, page 5 of the doc). But again when I declared the passive components as a net-tie the DRC didn't throw any errors this time.

However, as learning experience I'm still willing to know any better solutions to make a symmetric trace without affecting the DRC.

Tnx