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How to connect AGND and DGND in multilayer PCB?

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  • How to connect AGND and DGND in multilayer PCB?

    Hi
    Dear Robert
    I am before anything, thank you from all of the tips and tutorials. They are very practical and useful.

    I have a question about how to connect AGND and DGND together?
    I have a project PCB that consists of TMS320C6416T,XC3S5000, SRAM, AD9258(Two numbers), Decoder and Encoder Video and etc.
    My Layer Stack PCB is consider 12 layers that are arranged as follows:
    1=Signal , 2= GND, 3=signal, 4=signal, 5=GND, 6=power, 7= power, 8= GND, 9=signal, 10=signal, 11=GND ,12=signal.
    Question:
    Do I consider one of the ground plane as AGND and other ground plane as DGND? And then connect at one point (star ground) the AGND and DGND?
    Or
    do I split the AGND related to each component and then it connect to DGND with ferrite bead or trace?
    Or
    Do I not consider any AGND and DGND? Rather, consider all as GND?
    Regards.

  • #2
    Thank you Baneshat.

    I have never done AGND as whole plane under whole board which has digital and analog circuits. And I would not probably do it. I am not sure if that big AGND could not pick up noise from digital circuits.

    I am not sure how big your analogue area is and how sensitive it will be. On standard processor boards with small analogue areas I keep only DGND, but I am very careful how I place the analogue components. I try to use a "quite" place (e.g. corner of PCB, where currents from the other circuits are not going to flow in the analogue area). I also try to place analogue components on one side of PCB only (e.g. only TOP or only BOTTOM) and I do not mix analogue and digital signals on one layer in that area.

    In cases, when I was not sure, I created local AGND. However around AGND plane I have placed number of footprints for 0R resistors. Then I tested what was better .. if one 0R or number of 0R. The biggest problem with separated AGND which we had was higher EMC, especially if you will be connecting cables to the analogue plane.

    I hope this helps.

    Comment


    • #3
      Dear Robert
      Thank you very much for your help and guide.
      Baneshat

      Comment


      • #4
        Hi everyone,

        I have some questions related to AGNDs and GNDs. I have a similar problem to that.

        I'm working on a design with ADCs and I have to different GNDs: AGND and DGND. And according to the reference design (4 layers), AGND and DGND have to be joint.

        Click image for larger version

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        My stack up has 6 layers: L1 - SIGNALS, L2 - GNDs, L3 - MIX (SIGNALs + GNDs), L4 - MIX (SIGNALs + GNDs), L5 - GNDs and L6 - SIGNALS.

        I have some questions:

        1º.- I have in the layers L2 and L4 the planes AGND and DGND and they are separated 0.2 mm between them. Do you think is good enough?
        2º.- I don't know how to join these two planes, because as you can see in the reference design the join is placed in the L1, but in my particular design, I cannot do that because my DGND and AGND planes are in the layers L2 and L5. So If I create a simple component and I place it in the L1, I would have to place vias below the ADC [JP1 and JP2], however, I would like to avoid placing vias below an ADCs (I think is not going to be good).


        Click image for larger version

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        So, What way do you think is the best way for joining AGND and DGND?

        I thought these two ways:

        1º.- To place the component (for joining the GNDs) in another place in order to avoid placing vias below the ADC. For example between the two ADCs, but using vias.
        2º.- Is there any way to create a component in an internal layer? This way I could avoid placing vias.

        Best regards.

        Comment


        • #5
          Dear
          Subject AGND and DGND is extensive and complex discussion. Their connection depends on a lot of parameters.
          according the experience I have in various designs, I propose that:
          consider the just one GND by one or two plane, so that do not route(drawing) any track in them.
          Then connect the all GND pins to the GND plane by vias. Or create the local AGND under the each component and then connect to the GND plane by track or BLM in the one point.
          *** Drawing a track is not good across on the GND plan.

          Comment


          • oscargomezf
            oscargomezf commented
            Editing a comment
            Thank you Beneshat,

            When you say: "*** Drawing a track is not good across on the GND plan." Are you are speaking about the first screenshot I've attached? I understand you meant it's better to use a plane only for GNDs, isn't it? That is to say no use other signals on the GND plane.

            Best regards.

        • #6
          A) normally I use same GND and I would make the analogue part as short and small as possible
          B) or I would "completely separate" the circuits, so the PCB would be designed the way, that it would be almost like two/three independent PCBs but placed on one big PCB. I would probably still kept one GND, but it would be only connected locally and probably on the bottom layer so in case of problems I could play with the AGND / DGND connection.

          1) If I need, I use 1mm - 5mm or wider gap to separate circuits. The gap is never crossed by any wires, if you pick up the PCB, and point it to source of light, you should clearly see the gap.
          2) If you really would like to join the planes in one point by a component, I would use 0R

          1) I believe, the connection point should be at the place where all the signals are going from DGND to AGND, so ideal place may be under the chip
          2) Could you attach a link to a document why and when VIAs under component could cause problems? I am curious.

          PS: I would not connect GND and AGND together in two places (as shown at the picture). I would probably separate the AGND to AGND1 and AGND2. If these two circuits needs to have same ground, then I may really consider to use only one GND or I would be thinking how to minimize digital circuit on the whole board, maybe designing one separate board with the ADs only ... it really depends on the application and whole circuit.

          Comment


          • #7
            Hi Robert,

            1º.- According to: "1) If I need, I use 1mm - 5mm or wider gap to separate circuits. The gap is never crossed by any wires, if you pick up the PCB, and point it to source of light, you should clearly see the gap." I wanted to mean the gap distance (clearance) between AGND and DGND. I'm using 0.2 for AGND / DGND and 0.5mm between power planes (+5VA, +5VD, +12V -12V) .And yes, I know what you mean. All the tracks have to have a GND plane below them.

            2º.- According to: "2) If you really would like to join the planes in one point by a component, I would use 0R". Is it big enough a 0603 resistor?

            3º.- According to: "1) I believe, the connection point should be at the place where all the signals are going from DGND to AGND, so ideal place may be under the chip" I have two ICs, so I thought to place the resistor in the middle of these two ICs. Whan do you think about it?

            Stack Up: L1 - TOP (RED), L2 - GND (Ligh BLue), L3 - MIX, L4 - MIX, L5 - GND(Purple), L6 - Bottom (Blue)
            You can't see L5 but it's the same shape than L2.

            Click image for larger version

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            4º.- According to: "2) Could you attach a link to a document why and when VIAs under component could cause problems? I am curious." I don't have any document, but in the reference design don't use vias under the ADCs, so I suppose that it's better don't place vias under the DACs. I've made a question to analog devices about this issue because I think it's interesting. I will keep you informed about the answer.


            Best regards.

            PS: Another thing not related to this topic. I would like you consider to open a new branch on the FEDEVEL Community Forum called EMC/EMI. I think it will be very useful. I have a lot of questions related to EMC/EMI issues.

            Comment


            • #8
              I do not think I would do it this way. Imagine, that inside the chips, there are connections between digital and analogue part of the chip. Now, when currents will flow, they will need to do a big loops through the GND connection in the middle between chips. I am not expert for analog circuits, but I believe, you really may want to have the GND connections under the chips and not between them. Therefore I suggested two AGND planes (one DGND-AGND1 connection under one chip and one DGNF-AGND2 connection under second chip) or one common GND and reduce the digital ciruit to minimum.

              Comment


              • #9
                Ok Robert,


                I think I understood what you said. I attached you a new screenshot:

                Click image for larger version

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                Is this is the way you meant?

                Best regards.

                Comment


                • #10
                  I would not connect AGND to DGND in two places as it can cause current loops.

                  Comment

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