Via in plane cutout

[JohnsonMiller]

Hi Guys,

In big multi-layer boards, there are situation that via is placed in space between cutout of planes, here is an example:



that via may cause some manufacturing issues, my PCB manufacturer complain and blame me for possible fault, as it happened once.

My question is, can we create some design rule to detect situation like this?

BR,

[robertferanec]

Please, add the picture as an attachment.

[robertferanec]

The picture could help - so I can see the situation to which the PCB manufacturer is refereeing to.
I always adjust plane shapes as one of the last steps in PCB design and I am careful about how the edges of shapes follow VIAs. Usually I do not care much about unconnected VIAs between planes (these are usually removed anyway), but it may be important to check how VIAs which are connected to the plane are placed on the edge of the plane. I am checking for these situations manually.

[JohnsonMiller]

Hi,
Here is the image:

[robertferanec]

I guess, you are referring to NetR4_2, correct? And what PCB manufacturer said, why this would be a problem?