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Few clarifications needed in orcad and cadence allegro based on your videos.

vijunair , 04-24-2018, 08:39 AM
1. What is the difference between drawing shape and drawing line?
2. What is the difference between rats and nets?
3. If we find a mistake in the schematic or in footprint after completing the layout, How to go about it?

I have not completed the videos but these doubts arise in my mind. Pls let me know. Thanks
robertferanec , 04-25-2018, 02:07 PM
1) They are different objects, so different behavior e.g. if you are edditing them. Shapes are usually filled with copper, lines are just ... lines.
2) Rats are the blue lines (the kind of virtual lines showing you which pins are connected together). Nets - I use it a lot to name different things - e.g. net name, tracks, rats, signals, ... but usually it is the specific connection which we are speaking about (e.g. it may include pads, tracks, rats connected to the same net)
3) It is covered in the course later
vijunair , 04-25-2018, 07:50 PM
Thanks. I have few more questions
1. What is the basis of selecting track width 2mm and sometimes 5mm in power nets?
2. What was the reason for drawing rectangular shapes with vias ( around some pads connected to GND in bottom layer) and connect to ground plane?
thank you
robertferanec , 04-27-2018, 12:53 PM
1) I generally draw power tracks wider than other tracks. I adjust the track width based on pad width and available space.
2) For the important capacitors it is used because high currents will flow there. For the smaller caps, you can use tracks if you like, it is not necessary to create shapes or use multiple VIAs. However, I very often use shapes and multiple VIAs as then I am always sure that the connection is fine, so I do not need to worry about it (e.g. I do not have to search for information how high currents flow there).
vijunair , 04-30-2018, 06:32 AM
Hi Robert

I face some difficulties in the layout. All the left over connections are taken to different layer through vias and then you were connecting the vias together (in your videos). But I had to hover over the vias for long time for the connections to happen. Have you faced anything similar?

Also another abnormal thing which I faced is in the schematic. Some parts (another project) when I take from library, they are invisible and if I place it on the schematic page, then it creates a lot of problem as it cannot be connected through wires bcoz it is invisible and (cannot be removed from the schematic page as well) and still will be present in pcb editor for layout. Let me know if you can help me with this.

thank you
robertferanec , 04-30-2018, 07:13 AM
Please, could you attach some screenshots?
vijunair , 04-30-2018, 08:44 AM
Hi

I am attaching the screenshots. Pls see.
Thanks
vijunair , 04-30-2018, 06:16 PM
Hi
Somehow I was able to connect the vias after hovering over the vias for some time.
Reg the invisible part, what can be done is just type its refdes in the 'find' and see the new window with the location of the part. Double click there and the invisible part gets selected and now just press delete. But still dont know why this happened.

thanks
robertferanec , 05-01-2018, 08:13 AM
1) VIA problem - maybe, did you have VIA checked in your filter when the command was active?
2) The invisible part - that is very unusual. What sometimes may happen, that you place component outside of schematic (e.g. if you make your schematic page smaller). However it looks to me like you had the component directly in schematic and was invisible. I do not really know how that could happen, I have not seen anything like that.

I am very happy you figured out everything by yourself. Great job!
vijunair , 05-02-2018, 06:49 AM
Hi

How to see through holes in through hole pads in the layout? I remember you mentioned some settings to see the through hole. Can you pls mention here again?
Thanks
robertferanec , 05-02-2018, 07:46 AM
Setup -> Design Parameters -> Display and then check all the checkboxes with "hole" in the name
vijunair , 05-05-2018, 09:11 AM
For through hole pads for resistors, if the hole is 1mm and dia is 1.2 mm. All the design layers, I am giving 1.2mm. Soldermask top and bottom is 1.3mm. So the paste mask at the top and bottom will be between the 1mm hole and the 1.2mm design layers, right? So I need to mention pastemask in the mask layers as 1.2mm. let me know

I found only mounting hole and testpoint as thru hole pads in the videos, which are actually special cases. That is why I am looking for more clarity.
thanks
robertferanec , 05-06-2018, 06:28 PM
I am not really sure if I would use 0.1 mm ring around pad (1.2 dia - 1 hole = 0.2 / 2 = 0.1). That seems to me maybe too small (there may not be enough space when you will be soldering the pins). If you would like to have some examples, you can have a look at our open source projects here: http://www.imx6rex.com/
vijunair , 05-17-2018, 09:50 AM
My vias had 0.1mm ring only and DFM check asked to change these so I am going for a higher ring. Is there any way I can replace all the vias with new ones?

thanks
vijunair , 05-17-2018, 12:44 PM
Ok, it is same as replacing padstack. I want to know hoe to provide a cut in the PCB to physically isolate one section from the other.

Regards
robertferanec , 05-21-2018, 11:26 AM
Cut: modify board shape and maybe add a note into manufacturing layer.
vijunair , 05-21-2018, 12:53 PM
In the pad editor, I found an option 'slot'. Is this for this purpose or something else. Thank you
robertferanec , 05-21-2018, 08:42 PM
Very often you will find slots in connector footprint (e.g. Ethernet footprint can use slots to solder down Shield pins - the shield pins are from thin metal, so the pins are very thin but wide). Or power jack uses slots instead of regular holes to solder down the pins - again very often pins of power jacks are thin but wide: https://www.cui.com/product/resource/pj-002ah.pdf

vijunair , 05-22-2018, 11:54 AM
Is there any footprint library or schematics library for allegro? If so, how to use them?
thanks
robertferanec , 05-23-2018, 12:15 PM
We create all the symbols and footprints in our company.

There are services like SnapEDA ( https://www.snapeda.com/ ) or Ultra librarian ( https://www.ultralibrarian.com/ ) where you can download symbols and footprints. If you use Digikey to buy your components, some of the components already have links to these companies to download symbol and footprint for that components.

Also, when you install OrCAD, I think there are some libraries, try to have a look here: \Cadence\SPB_17.2\ools\capture\library\ and d:\Cadence\SPB_17.2\share\pcb\pcb_lib\symbols\ but as I said, I do not really use it.

vijunair , 05-25-2018, 01:38 PM
Hi Robert,
What is this DRC error abt? soldermask to pad and cline spacing...(M-L). Pls let me know how to resolve it.

thanks
robertferanec , 05-27-2018, 05:21 PM
Please, can you attach some screenshots?
vijunair , 05-28-2018, 09:02 AM
Actually downloaded some footprints from some websites and then used in layout. But those didn’t have soldermask and while sending for manufacturing..some soldermask relief is needed.. when I add soldermask ..it seems to be getting rectified.. I will catch on it if it repeats..Thanks
robertferanec , 05-28-2018, 10:25 AM
Actually downloaded some footprints from some websites and then used in layout. But those didn’t have soldermask and while sending for manufacturing..some soldermask relief is needed.. when I add soldermask ..it seems to be getting rectified..
- that is why we create our own symbols and footprints. We have our own standards and also, you need to be sure, that the symbols and footprints are correct. When downloading from internet, you never know ....
vijunair , 06-03-2018, 07:45 AM
Hi Robert
How to handle non plated holes? Because in the footprint it has only one pin whereas in schematic it has to connect 2 terminals. this application is for using current shunt BNC connector in the Pcb.

thanks
robertferanec , 06-03-2018, 11:05 AM
Can you attach some screenshots?
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