Few clarifications needed in orcad and cadence allegro based on your videos.

[robertferanec]

Can you attach some screenshots?

[vijunair]

Hi Robert
How to handle non plated holes? Because in the footprint it has only one pin whereas in schematic it has to connect 2 terminals. this application is for using current shunt BNC connector in the Pcb.

thanks

[robertferanec]

Actually downloaded some footprints from some websites and then used in layout. But those didn’t have soldermask and while sending for manufacturing..some soldermask relief is needed.. when I add soldermask ..it seems to be getting rectified..

- that is why we create our own symbols and footprints. We have our own standards and also, you need to be sure, that the symbols and footprints are correct. When downloading from internet, you never know ....

[vijunair]

Actually downloaded some footprints from some websites and then used in layout. But those didn’t have soldermask and while sending for manufacturing..some soldermask relief is needed.. when I add soldermask ..it seems to be getting rectified.. I will catch on it if it repeats..Thanks

[robertferanec]

Please, can you attach some screenshots?

[vijunair]

Hi Robert,
What is this DRC error abt? soldermask to pad and cline spacing...(M-L). Pls let me know how to resolve it.

thanks

[robertferanec]

We create all the symbols and footprints in our company.

There are services like SnapEDA ( https://www.snapeda.com/ ) or Ultra librarian ( https://www.ultralibrarian.com/ ) where you can download symbols and footprints. If you use Digikey to buy your components, some of the components already have links to these companies to download symbol and footprint for that components.

Also, when you install OrCAD, I think there are some libraries, try to have a look here: \Cadence\SPB_17.2\tools\capture\library\ and d:\Cadence\SPB_17.2\share\pcb\pcb_lib\symbols\ but as I said, I do not really use it.

[vijunair]

Is there any footprint library or schematics library for allegro? If so, how to use them?
thanks

[robertferanec]

Very often you will find slots in connector footprint (e.g. Ethernet footprint can use slots to solder down Shield pins - the shield pins are from thin metal, so the pins are very thin but wide). Or power jack uses slots instead of regular holes to solder down the pins - again very often pins of power jacks are thin but wide: https://www.cui.com/product/resource/pj-002ah.pdf

[vijunair]

In the pad editor, I found an option 'slot'. Is this for this purpose or something else. Thank you

[robertferanec]

Cut: modify board shape and maybe add a note into manufacturing layer.

[vijunair]

Ok, it is same as replacing padstack. I want to know hoe to provide a cut in the PCB to physically isolate one section from the other.

Regards

[vijunair]

My vias had 0.1mm ring only and DFM check asked to change these so I am going for a higher ring. Is there any way I can replace all the vias with new ones?

thanks

[robertferanec]

I am not really sure if I would use 0.1 mm ring around pad (1.2 dia - 1 hole = 0.2 / 2 = 0.1). That seems to me maybe too small (there may not be enough space when you will be soldering the pins). If you would like to have some examples, you can have a look at our open source projects here: http://www.imx6rex.com/

[vijunair]

For through hole pads for resistors, if the hole is 1mm and dia is 1.2 mm. All the design layers, I am giving 1.2mm. Soldermask top and bottom is 1.3mm. So the paste mask at the top and bottom will be between the 1mm hole and the 1.2mm design layers, right? So I need to mention pastemask in the mask layers as 1.2mm. let me know

I found only mounting hole and testpoint as thru hole pads in the videos, which are actually special cases. That is why I am looking for more clarity.
thanks