Hello,
During my course, i started reading schematics and i appreciate if you could answer to me some of my questions.
At first, i notice that all CPU's GPIOs are buffered with level translators IC (e.g 74LVC8T245 / ) but with the same voltage potential. (the two levels are 3V3 but with a ferrite bead or resistor). This is recommended for protection level and how is this explained?
Second, there is a common mode choke (L905), i know the theory of using something like that, but i dont know how can i decide for the exact inductance. (10mH) also i have the same question for emi filter choice (NFM18PC105R0J3).
Thanks in advance!
Thanos
During my course, i started reading schematics and i appreciate if you could answer to me some of my questions.
At first, i notice that all CPU's GPIOs are buffered with level translators IC (e.g 74LVC8T245 / ) but with the same voltage potential. (the two levels are 3V3 but with a ferrite bead or resistor). This is recommended for protection level and how is this explained?
Second, there is a common mode choke (L905), i know the theory of using something like that, but i dont know how can i decide for the exact inductance. (10mH) also i have the same question for emi filter choice (NFM18PC105R0J3).
Thanks in advance!
Thanos
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