Dear Robert,
I read design guide IMX6DQ6SDLHDG and see that PCIE_VPH pin need to be connected to VDD_HIGH_CAP and is generated by IMX but in openrex schematic, you connect it to 2V5 that is generated by PWR PMIC. Can you explain why? More detailed in these pictures below.
I read design guide IMX6DQ6SDLHDG and see that PCIE_VPH pin need to be connected to VDD_HIGH_CAP and is generated by IMX but in openrex schematic, you connect it to 2V5 that is generated by PWR PMIC. Can you explain why? More detailed in these pictures below.
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