SLP_S3 signal in VTT regulator

[justaelvis]

Dear experts,
I use a termination regulator TPS52100 from TI to supply VTT rail for DDR3 memory interface. But the LDO has an EN pin which specified for SLP_S3 signal, as I know this signal is generated by CPU. I want to know what is the function of this signal in motherboard and I wonder if I can turn on the LDO from other signal (which remain 'high' at all time) or not. And does it affect the DDR3 operation. I have check OpenRex board but it does not have the SLP_S3 signal.
Thank you!

[robertferanec]

S3 is used in x86 .. it is know also as Sleep. In this mode, most of the board power is switched off, but memories are still on. If your board doesn't support sleep, than you can use a different signal to controll VTT regulator, just be sure you are following proper power up/down sequence.

[justaelvis]

Thank you so much for your reply Robert

[ankit.ahlawat]

Dear Robert,
I am just getting started with I.mx6 quad. Am little confused about power supply. I have two options about supply sequencing one is PMIC sequence and another is regulators power rails sequence but i don`t know which is most reliable from these options.

[robertferanec]

Both options are reliable and work fine. It is a question more about space available on your board and cost.

[ankit.ahlawat]

Got it ! Thanks