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DDR3 RAM- FPGA connection

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  • DDR3 RAM- FPGA connection

    Hi,
    I designed a board with Artix7 and DDR3 RAM. For connections please see attached. Vivado gave an error and the error screenshot is also uploaded. Do u have any solution for this?

  • #2
    I have not tried DDR3 in FPGA, but I noticed CS in the group - is that correct?

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    • #3
      Originally posted by MustafaE View Post
      Hi,
      I designed a board with Artix7 and DDR3 RAM. For connections please see attached. Vivado gave an error and the error screenshot is also uploaded. Do u have any solution for this?
      Hi
      I m starting now to study DDR memory interface using FPGA.

      But I hope i can help you...

      It seems your problem is related to PINs assotiation for data/address group signals whitin the bank.

      You should select the correct bank for your device, ONLY using MIG to select and validate the pins assignment
      for data and address/control signals.

      Maybe you selected wrong bank (each bank has a different PHY to I/O signals)
      or you should separate data group in a bank and address/control group in another bank.

      Check it using MIG.
      Click image for larger version

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      It could be useful to have a look at a reference schematic, as Robert always says in his lessons , for banks/groups selection in DDR interfacing:
      http://https://www.xilinx.com/suppor...rd-v7-fpga.pdf
      (on page 14)

      and maybe it could be usefull also to check another example of DDR pins assignment, here:
      https://www.xilinx.com/support/documentation/ip_documentation/mig_7series/v4_2/ug586_7Series_MIS.pdf
      check " design guidelines"
      on page 192 and "DDR3 pinouts Example" on page 213.

      I hope it can help you somehow
      Regards

      Rocco

      Comment


      • MustafaE
        MustafaE commented
        Editing a comment
        Thank you. You are right about the priorities of pin assignment. I did the pin assignment according to what you showed " using mig generator".

    • #4
      It looks like you may have an issue with your board design. I suggest you try reinstalling Vivado and/or adjusting the clock frequency settings on the Artix7. If that doesn't work, you may want to consult a technical expert for help troubleshooting the DDR3 RAM. MLSDev offers custom app development services with a wide range of budgets and project scopes. App development costs of your project will depend on the complexity of the design and features, as well as the platform you are developing for. Generally, the cost of an app development project starts at around $20,000 and can go up to hundreds of thousands of dollars for more complex projects.
      Last edited by Serhioesmiles; 04-25-2023, 03:49 PM.

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