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What is the best position to place test points?
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I have seen test points on PCIE or memory bus, but not everyone put them there (you need very expensive equipment to be able to measure that signals) -
Thanks, Lakshmi and robertferanec for the tips, it really helped me. In your experience, it is a common practice put test points on high-speed tracks or normally the industry have different ways to make the tests?Leave a comment:
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I often place testpoints on track (no stubs) and usually on the bottom. But as Lakshmi pointed out, be careful about high speed.
PS: I have seen many people using TEST VIAs - it is basically a VIA, but with no mask. That is also a good solution.Leave a comment:
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Well it depends what those TP are pointing If it's for a Voltage It's always better in the Bottom.
Are those Rx and Tx pins of the Antenna OR UART?
If of Antenna u need to be careful.
Keep the stubs as short as possible.
have a look at these:
Recently I read a posting from a well-known In-circuit Test (ICT) vendor defending the use of test pads on high-speed signals. I found this message to be rather amusing, since the prevailing wisdom is to avoid these to prevent signal integrity issues. The posting went something like this...
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What is the best position to place test points?
Hi guys.
I'm put some test points on my board and I was wondering which position is the best one to put this test points. It is better to put over a track or make some kind of "stabs". I know that stabs, in general, are bad in high-speed interfaces, but also put the test over a track expose that region and I think that it is a bad thing too. So, what is the best way?
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