BGA daisy chain test fixture VIA issue.

[waqsoh]

Dear ,

I made my first BGA daisy chain test fixture. I have following issues.

1- BGA fanout via has green area around it. Figure 1.
2- Ground Vias have splintered green aroung it. not sure whether related to thermal relaxation Figure 2.
3- How altium automatically connects VIA to layers . For example for my 4 layer board (two signals, two ground layrers). Are my ground vias connected to Top, Bottom and 2 ground layers as they should automatically?(I connected my two ground layers to ground net and top and bottom SMA pads are connected to ground net). Are my BGA fanout vias are connected to top, bottom layer and not connected to ground layers as they should automatically?
4- is the dashed line where my PCB actually starts. Figure 3.


Figure 1. BGA fanout via with green around it.



Figure 2. Ground via with green are around it.



Figure 3. PCB staring point..

[robertferanec]

1- BGA fanout via has green area around it. Figure 1.
- that is clearance (empty space / area without copper) on the (green) plane layer (in your case L2)

2- Ground Vias have splintered green aroung it. not sure whether related to thermal relaxation Figure 2.
- again, green is the area without copper on the plane layer and it looks like that because you are using thermal relief

3- How altium automatically connects VIA to layers . For example for my 4 layer board (two signals, two ground layrers). Are my ground vias connected to Top, Bottom and 2 ground layers as they should automatically?(I connected my two ground layers to ground net and top and bottom SMA pads are connected to ground net). Are my BGA fanout vias are connected to top, bottom layer and not connected to ground layers as they should automatically?
- yes, they are connected automatically by method specified in the rules (e.g. that is why planes are connecting through thermal relief, you can change it to FULL in the rules if you need)

4- is the dashed line where my PCB actually starts. Figure 3.
- yes

[qdrives]

i would say that you do not use the standard colors to begin with.
Usually, the 'bare' board is black (or at least very dark). In your case I expect it to be green.
The "spokes" you see in figure 2 is thermal relief on the copper on an inner(?) layer Gnd that you gave the black color. Inner layer pads of the via a much bigger than the outer layer.

In answer to question 3 - yes, Altium will automatically connect the via's (or Through Hole pads) to any similar object on the other layers (unless commanded otherwise).
Answer for 4 - Yes the dashed line is the board outline.

To reset the colors to standard:
1) Go to View / Panels / View Configuration (or press the "L" on the keyboard)
2) Go to the View options tab.
3) Select "Altium standard 2D" in the Configuration drop down.



For the via's is it set to "simple"?

[waqsoh]

Dear qdrives
1- I use standard 2d colors as shown in Figure 1. The board design with colors for each layer.
2- Figure 2 shows the GND via properties which is simple via. I want the via to be connected to L1(signal layer ground pad), L2(GND plane layer), L3(GNDplane layer) and L4 (signal layer ground pad).But mine looks different from yours in your post.
3- Figure 3 shows via in multilayer via mode.
4- Figure 4 shows via in L1 (signal layer) single view mode. I think grey area in thermal relief shows empty spaces .
5- Figure 5 shows via in L2 (GND layer) single view mode. Since layer 2 is plane layer, which is negative layer, so i think green area in thermal relief shows the empty space in ground layer. am i right?
6- Figure 6 shows via in L3(GND Layer) single view mode. Since layer 3 is plane layer, i think maroon color shows empty area, am i right?
7- Figur 7 shows vin in L4(signal layer) single view mode. i think grey area shows empty space in thermal relief



Figure 1. Board showing standrd altium 2d color scheme, along with the color of layers.



Figure 2 shows the GND via properties which is set to simple but it looks different from your via design


Figure 3 shows GND via in multilayer view mode


Fgiure 4 shows GND via in L1 single layer mode


Figure 5 shows GND via in L2 single layer mode


Figure 6 shows GND via in L3 single layer mode


Figure 7 shows GND via in L4 signle layer mode

[waqsoh]

BGA fanout Via

Figure 1 shows BGA fanout Via which i want to conenct top layer BGA pad to Bottom layer trace.
Figure 2 shows BGA fanout via properties. Again my via looks different than yours in picture. I do not why.
Figure 3. shows BGA fanout via in multilayer viw mode
Fgiure 4. shows BGA via in L1 layer single layer view mode,
Figure 5. shows BGA via in L2 layer single layer view mode. since L2 Layer is plane layer, i think the green are shows the via clearnce i.e via is not connected to layer 2. Am i right?
Figure 6. shows BGA via in L3 layer single layer view mode. Does the maroon color shows via clearnce area.
Figure 7. shwos BGA via in L4 layer single layer view mode. Here the via is connected to bottom trace.


Figure 1. BGA fanout via, connecting top layer BGA pad to Bottom layer trace.


Figure 2. BGA fanout via properties. Herer there is no thermal relief.


Figure 3. BGA via multlayer view mode


Figure 4. BGA via L1 Layer view


Figure 5. BGAvia L2 layer view


Figure 6. BGA via L3 layer view


Figure 7. BGA via L4 layer view

[waqsoh]

qdrives

A brief introduction of my first project is as following. It is a BGA daisy chain project for TDR purpose. I am trying to attach the project files but it's size is 10 MB and it is not allowing me to attach the Altium Project files, I am sharing the google drive link.
https://drive.google.com/drive/folde...pJ?usp=sharing
The board is shown in Figure 1. The board consists of BGA device. The center BGA solder balls are connected in one daisy chain, with one sma connector for input and one sma connector for output. The outer BGA solder balls are put into seperate channels for TDR. For example each outer channel consists of two solder balls, one solder ball connected to SMA, top trace and the second solder ball connected to via, bottom trace and SMA.
So there is one channel for center daisy chain and 11 channels for outer solder balls. There are 24 SMA connectors for the 12 channels.


Figure 1. Board Layout

[robertferanec]

1- BGA fanout via has green area around it. Figure 1.
- that is clearance (empty space / area without copper) on the (green) plane layer (in your case L2)

2- Ground Vias have splintered green aroung it. not sure whether related to thermal relaxation Figure 2.
- again, green is the area without copper on the plane layer and it looks like that because you are using thermal relief

3- How altium automatically connects VIA to layers . For example for my 4 layer board (two signals, two ground layrers). Are my ground vias connected to Top, Bottom and 2 ground layers as they should automatically?(I connected my two ground layers to ground net and top and bottom SMA pads are connected to ground net). Are my BGA fanout vias are connected to top, bottom layer and not connected to ground layers as they should automatically?
- yes, they are connected automatically by method specified in the rules (e.g. that is why planes are connecting through thermal relief, you can change it to FULL in the rules if you need)

4- is the dashed line where my PCB actually starts. Figure 3.
- yes

[waqsoh]

robertferanec Hi robert. I now understand all the points. I have just one last one. In qdrives post no. 02 his via is circular shape on some layers while mine in post no. 03 is square shaped on all layers. Is there any diference in settings?

[qdrives]

waqsoh Ah yes, planes... I do not use planes. Only polygons as you have more control that way. Planes have colors inverted.
I also see that Altium draws a square on the via layer when that layer is in a polygon or it is a plane layer.
The via is round on the other layers.
See the next picture: polygon connection on layers 4 and 6.