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Vias showing on polygon

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  • Vias showing on polygon

    Why does Vias that are supposed to be located on other layers and buried in the layers show up in bottom layer pour. Is there any setting that will prevent that or is this how it is with Vias? For example in the picture the vias are on top layer and I am pouring on Bottom layer. The most they would go is till Layer 4 or layer 5 (L4,L5) so is there anyway the via can be set to penetrate just til L4 and L5 and not showing on L6 (Bottom Layer) or am I misunderstanding something?

  • #2
    Hi zeino,

    The most basic and commonly used type of VIA in the PCB design is called through-hole via (TH via). I go from the top layer all the way to the bottom layer, through the whole stack of the board. TH vias are so common because they are the easiest type of VIAs for manufacturing, and the cheapest one as well. They also allow for greatest flexibility - you can connect signals on any layer to them. Another advantage of TH vias is that they can be convenient to use as test points during the debugging of a board. One of their disadvantages is that they take space on all layers, even if you need to connector only the top 2 layers for example. I will recommend you to stick to TH vias only, unless you have a good reason not to.

    Apart from TH vias, you can also have blind vias and buried vias. Blind vias go from a surface layer (top/bottom) to an internal layer. Buried vias connect 2 internal layers and don't show on the surface of the PCB at all. The advantage of those types of vias is that they don't occupy unnecessary space on many layers, but they are usually considerably more expensive to manufacture.

    In Altium you can change the type of via from the vias properties (right click on a via and select properties). Then from the Drill Pair drop down menu you can select the start and finish layer for the via. With a simple stack you will only have one option: Top Layer - Bottom Layer. If you wish you can create more Drill Pairs from the bottom left corner button in the same properties window.


    • #3
      Thank you very much Mairomaster for answering my question.


      • #4
        Here is a picture from interesting Mentor document called HDI Layer Stackups for Large Dense PCBs. That may help you to answer some questions.

        Click image for larger version

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        • #5
          Thank you Robert, this is very interesting. It explains everything thank you very much for the link. I learned the classification of HDI 1,2 and 3.

          Interesting quote from the paper: "Although HDI fabrication is pervasive in PAC Rim and China, North America slow to adopt" I would have thought it would have been vice versa. Seems there would be PCB manufacturers in China comfortable with buried Vias.


          • #6
            Glad to help