Hi all,
I would like to route 2 DDR3 IC signals with fly-by routing topologies. Could you help me about the below questions that confuse me?
I would like to route 2 DDR3 IC signals with fly-by routing topologies. Could you help me about the below questions that confuse me?
- Can ı route DQ signals at different layers ? (Total length will be same)
- Can ı route Address signals at different layers ? (Total length will be same)
Comment