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Example of length tuning for FPGA-DDR3 track

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  • Example of length tuning for FPGA-DDR3 track

    There are many videos on youtube (including ones from Robert) that cover the topic of length matching and length tuning for high speed tracks. However, is there a single video that handles the topic from start to finish in a concise way? If not, what are the videos that I must watch in specific sequence to understand this topic from start to end? I have found several videos but they do not cover the entire topic from start to end for Altium designer from a practical perspective.

    I am not looking for FPGA-DDR3 specifically. Even a different start-end device that explains the basic principles will do. However, since I eventually want to do this DDR3 design at some point in my life, having example of this specifically will be best.

  • #2
    What exactly are you missing?

    The steps are usually like this:
    1) Read design guide to find out requirements
    2) Setup rules
    3) Do the length matching

    There is nothing super special about it.