Impedance Matching

[ecworks]

Hello Robert and my other friends,
I already know Robert by his videos and tutorials and thorough mails,but I am new in this forum,i am so happy to see the sincere helping mentality of all the designers in this forum.I love PCB designing and a beginner too.I am very much interested in PCB designing,i started designing in circuit wizard then used eagle on that time i see altium like it very much...i was doing small level pcb designing for small circuits and 2 layer etc, so i do not care about high speed PCB designing rules.Now i wish to study about high speed PCB designing,for that i go through some pdf and some videos and know about impedance matching,differential pair,length matching etc.i wish to know more about these and other high speed PCB designing rules.As a first step please give some explanation or some useful link to know more about impedance matching queries
- whats is mean by impedance matching
-what are the types of impedance matching techniques
-For what purpose we using impedance matching(advantages of impedance matching)
-what are the steps or process of impedance matching
-How can we do impedance matching in altium
i hope your valuable replies as early as possible

Here i am attaching some pictures of my PCB designs. i need the support,suggestions,feedbacks,and drawbacks of my whole friends. Thank you very much

[robertferanec]

Awesome boards! I like the triangle one

Simply to say - impedance is a number specified in design guides. Usually for digital interfaces it is 50 OHM single ended, for differential pairs it is usually 90 or 100 OHM differential pair impedance. If you meet the impedance, the quality of the signal will be the best (minimum reflections, crosstalk, ....). Impedance is defined by track geometry and stackup. I recommend you to install a free tool called Saturn PCB toolkit and play with it. You will figure out very quickly what are the parameters which define & influence impedance

If you would like to follow impedance rules, you need to use a specific stackup + track geometry. You can design the stackup and get track geometry together with your PCB manufacturer. Have a look at some example here: Download PCB Stackups – Free for your Projects

[ecworks]

Awesome boards! I like the triangle one

Thank you very much
robertferanec
I am very much happy in your comment,its a good inspiration for me thank you sir.I also expect some drawbacks,and suggestions

Saturn PCB toolkit and play with it. You will figure out very quickly what are the parameters which define & influence impedance

sir there is any tutorial on saturn PCB tool kit? we can make specific stackup + track geometry with this software?

You can design the stackup and get track geometry together with your PCB manufacturer. Have a look at some example here: Download PCB Stackups – Free for your Projects

sir whats is our part for creating a specific stackup + track geometry by the manufacturer , just give the information about the board by us? the below details are needed to give to the manufactur to create specific stackup + track geometry ? i am waiting for the valuable replies

[robertferanec]

The posts from my blog will help you. I see you have already found one How to design PCB stackup. You can also have a look at 5 Steps to define a Custom PCB Stackup

[ecworks]

The posts from my blog will help you. I see you have already found one How to design PCB stackup. You can also have a look at 5 Steps to define a Custom PCB Stackup

thank you sir

[Gabor]

Hello Robert,

Although I already got some answers to my questions, I copy my mail here, that I sent You a few days ago:

After watching several tutorila video from You, I have now a question about designing the differential pairs.
In this video www.youtube.com/watch?v=Lb3sEcolkOA You edit the differential pairs rule properties upon a
pdf document of a PCB stackup. My question is that is it a general 12-layer stackup of a manufacturer, where
I can find track properties for a new design, or is it a calculated, based on an exact design?
If I'd like to start a new design I need a stackup from a selected manufacturer, where I can see the thickness of
layers, materials. Right? Or I can send my final design and then they can calculate the impedances from my
gerbers and can recommend the track widths and gaps? How it works, which step is the first?

Thanks, Regards,
Gabor

[robertferanec]

Hello Gabor, this may help you: http://www.fedevel.com/designhelp/fo...-manufacturers

[Gabor]

Thank You Robert, it was useful. :-)
Regards,
Gabor

[clive.seguna]

Currently I am designing a high speed PCB to transfer data at 3.125Gbps per differential lane using an FPGA. From the literature review and online tutorial videos provided by Robert I have managed ​to use Altium to implement such PCB. Were very useful and would like to thank Robert for this.

I managed also to use altium signal integrity tool through DRC to check for impedance matching, overshoot and undershoot. I have provided a continuous pulse stimulus of 1Volt and managed to obtain an overshoot of less than 10% as indicated by altium DRC tool. Also I wanted to check if the DRC impedance matching test passes by providing a minimum and maximum constraint impedance of 40 ohm and 60 ohm per single trace. My target is 50 ohm per single trace. From DRC I got an AVERAGE value within the required 40 - 60 ohm range per trace, but the MAXIMUM impedance of some traces is reaching a value of 96ohm. What should I take into consideration the AVERAGE impedance which is within required range or the MAXIMUM impedance value ?? It is very difficult to fine tune such traces. All high speed traces have equal lengths and are located in a layer sandwiched between two ground planes.

Thanks again for your help.

Regards,
Clive

[mairomaster]

There is a good chance that Altium is showing nonsense, I wouldn't really trust its simulation tool.

If a track has a constant width on a particular layer, all its segments have the same impedance. You can't be getting such big variations. Also for differential signals you should care about the differential impedance, not the single ended one.

Summary - if you have a layer stack provided by a manufacturer with particular track geometries and you are using them, you can't really go wrong with impedance.

[clive.seguna]

I tried to keep all traces the same width so that I don`t get a lot of variation. In some cases I couldn`t because I had to pass traces between FPGA via pins. Further the manufacturer told me that the layer stack details must be provided by the PCB designer should and not manufacturer.

​I used Saturn PCB designer tool and compared the resultant trace width with that of altium impedance calculation and the trace widths almost or nearly matched.

To manufacture the board is quiet expensive ( 12 layer) and since I don`t have such accurate tools or a lot of experience with high speed PCB design I am not sure if it will work.

So which simulation tool can or do you trust ? How can I be sure that my design will work ?

[robertferanec]

mairomaster is right. Also:

​

the manufacturer told me that the layer stack details must be provided by the PCB designer should and not manufacturer

Some manufacturers will tell you that. They are lazy (means, not interested) to help you to design stackup or in the worse case, they don't do real impedance controlled PCBs.

The final confirmation about your stackup and impedances always have to come from PCB manufacturer. Only PCB manufacturer can include all the manufacturing factors into the calculations and provide you with accurate numbers and manufacturable stackup. So, you may want to contact a different PCB manufacturer or you may want to use an existing stackup.

[mairomaster]

For such high-end board you need a good manufacturer. Then you need to speak to them, accurately describe your board and its needs and they should provide you with a suitable stack. If they can't, they are not good enough for such board. You can almost never calculate it accurately enough yourself, they have their special tools and lots of experience. Also they know their materials, etc.

What is your FPGA pitch and what size of vias are you using? You can tell the manufacturer what maximum space (width) you have for a differential signal on particular layer and they can try to take this into consideration for the stack. If that is still not working, you can make a small compromise for the gap/width of the diff pairs, in the areas where they need to go between vias. Just try to keep those parts as short as possible.

For standard things you don't really need simulations. As Robert says in one of the lessons "I may consider simulation if I need to break too many design rules" (if I remember correctly). I've used Hyperlynx and it's quite good, but even then you need to know the tool well, have good ibis models, set up the simulations well, etc.