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Via routing technique

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  • Via routing technique

    Currently, I take Advance PCB Layout course. I have question about via routing. Which is the best via strategy option if I stick with your via structure? If I want to route signal from L1 to L10, should I use thru hole via or uVia+buried Via?

    If I use uVia+buried Via, I can have more space on L11, L12? What is draw back then?

  • #2
    Normally I try to avoid using too many VIAs in one signal (not recommended for high speed signals), but at the same time I have to consider "no or minimum stubs" requirement (stubs are also not recommended for high speed signals). Sounds complicated? So, for example, we use uVIAs for L1-L3 and L10-L12, we use buried VIA for L3-L10 and for anything else (including L1-L10) we use through hole VIAs. For very high speed signals, we may only use through hole VIA and route them on TOP and BOTTOM only, or we use a special stackup (e.g. uVIAs directly from L1-L3).


    • #3
      So if for high speed signals we are to avoid stubs and if the signal is trans versing on a couple of layers - then a through hole via itself will becomes a stub. Are there any guidelines as to signal speed versus permissible stub length ?
      IE above 1GHZ only uVias with 0 stub length is permissible?


      • #4
        I am careful with through hole VIAs and I try to minimize the "unused" length in VIA during layout for signals above 1GHz and this way I have not seen any problems with using through hole VIAs up to 5GHz. If you need to design something at higher speed, you can find some documents on internet e.g.:

        - Design Guidelines for 100 Gbps - CFP2 Interface.pdf
        - Via Optimization Techniques for High-Speed Channel Designs.pdf
        - Optimizing Impedance Discontinuity Caused by Surface Mount Pads for High-Speed Channel Designs.pdf


        • #5
          Allot to learn when doing high speed stuff ... back to the basics for now /// thanks Leigh