Hi everyone,
I’ve started to use control impedance because I have to add in my design a USB/UART transceiver and three gigabit phys, so I was reading in the datasheet that it’s compulsory to add controlled impedance.
I had never used impedance control in my tracks before but I've read in this blog that it’s necessary for the normal tracks too and it has to be 50 Ohms. And this is my first question:
1º.- Is that true? Or Is this only necessary in high-speed lines like USB PHY and Ethernet PHY transceivers (RXD0, RXD1, RXD2, RXD2, RX_CTL, RX_CLK, ...etc)? Do I have to do controlled impedance in I2C lines too [50 Ohms]?
The manufacturer, which I usually work, gives me this information of the stack-up. View photo 1: Stack_up_6_layer.png.
I'm trying to understand well the way to design PCB with controlled impedance. After reading a lot of this issue, I've got an important premise: “The manufacturer have to give you the information about the material of your stack-up: thickness of all prepegs and cores, Er, copper weight, plating thickness,... etc;â€. And then knowing this data, you have to calculate the conductor width, conductor height and conductor spacing for differential impedance, and conductor width and conductor height for single ended impedance, using for example Saturn PCB Design toolkit.
But when you get this data from the manufacturer: thickness of all prepegs and cores, Er, copper weight, plating thickness, …etc. they are theoretical values. So these are other important questions:
2º.- Are these theoretical values enough to get your impedance goal?
3º.- Is it necessary to create TC (Test Cupons) on PCB to validate the calculations and make sure the design is right?
According to the material data, I have a lot of doubts about the dielectric constant (also known as relative permittivity). The PCB manufacturer didn’t give me the Er, but I was surfing on the internet and I found that for the Prepeg 2116x2 is around 3.8. I was doing test with the different values of Er with the application Saturn PCB Design toolkit and I realized that it’s extremely important this value, if you get a light wrong value your calculations will be out of range, so:
4º.- Is it a good idea based the Er value on an internet search? Where could I get this value in a reliable way?
5º.- Er depends on the frequency so what frequency value do you get to make the calculations with the Saturn PCB Design toolkit?
For USB2.0, the requirements are Zdiff = 90 Ohms with a tolerance of +/-10%, view Photo 2: Saturn_PCB_DIFF90.png.
6º.- Do you think this conductor width and conductor spacing are ok?
For gigabit Ethernet, the requirements are Zdiff 100 Ohms, obviously you goal is to get 100 Ohms, but do you have to take into account the single ended impedance or it doesn't matter?, view Photo 2: Saturn_PCB_DIFF100.png.
7º.- Is this design right?
Or Do I have to try to achieve a single impedance of 5o ohms?
And for the rest of the tracks:
8º.- What do I have to get? impedance of 50 Ohms or 55 Ohms?
Best regards.
I’ve started to use control impedance because I have to add in my design a USB/UART transceiver and three gigabit phys, so I was reading in the datasheet that it’s compulsory to add controlled impedance.
I had never used impedance control in my tracks before but I've read in this blog that it’s necessary for the normal tracks too and it has to be 50 Ohms. And this is my first question:
1º.- Is that true? Or Is this only necessary in high-speed lines like USB PHY and Ethernet PHY transceivers (RXD0, RXD1, RXD2, RXD2, RX_CTL, RX_CLK, ...etc)? Do I have to do controlled impedance in I2C lines too [50 Ohms]?
The manufacturer, which I usually work, gives me this information of the stack-up. View photo 1: Stack_up_6_layer.png.
I'm trying to understand well the way to design PCB with controlled impedance. After reading a lot of this issue, I've got an important premise: “The manufacturer have to give you the information about the material of your stack-up: thickness of all prepegs and cores, Er, copper weight, plating thickness,... etc;â€. And then knowing this data, you have to calculate the conductor width, conductor height and conductor spacing for differential impedance, and conductor width and conductor height for single ended impedance, using for example Saturn PCB Design toolkit.
But when you get this data from the manufacturer: thickness of all prepegs and cores, Er, copper weight, plating thickness, …etc. they are theoretical values. So these are other important questions:
2º.- Are these theoretical values enough to get your impedance goal?
3º.- Is it necessary to create TC (Test Cupons) on PCB to validate the calculations and make sure the design is right?
According to the material data, I have a lot of doubts about the dielectric constant (also known as relative permittivity). The PCB manufacturer didn’t give me the Er, but I was surfing on the internet and I found that for the Prepeg 2116x2 is around 3.8. I was doing test with the different values of Er with the application Saturn PCB Design toolkit and I realized that it’s extremely important this value, if you get a light wrong value your calculations will be out of range, so:
4º.- Is it a good idea based the Er value on an internet search? Where could I get this value in a reliable way?
5º.- Er depends on the frequency so what frequency value do you get to make the calculations with the Saturn PCB Design toolkit?
For USB2.0, the requirements are Zdiff = 90 Ohms with a tolerance of +/-10%, view Photo 2: Saturn_PCB_DIFF90.png.
6º.- Do you think this conductor width and conductor spacing are ok?
For gigabit Ethernet, the requirements are Zdiff 100 Ohms, obviously you goal is to get 100 Ohms, but do you have to take into account the single ended impedance or it doesn't matter?, view Photo 2: Saturn_PCB_DIFF100.png.
7º.- Is this design right?
Or Do I have to try to achieve a single impedance of 5o ohms?
And for the rest of the tracks:
8º.- What do I have to get? impedance of 50 Ohms or 55 Ohms?
Best regards.
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