Hi everyone,
I'm starting with the impedance calculations. I made everything with Saturn PCB design. And this is my result PCB stack up and track geometry - 8 layer.png I think the calculations are ok, but obviously I'm not completely sure. These are me calculations for DIFF90, DIFF100 and DIFF50.
L1 (Ref L2), L8 (Ref L7):
Class Name Width(um) Space(um) DIFF Theoretical Value SE Theoretical Value Target Value
DIFF90 203 213 89,9840 49,9670 90 / 50
DIFF100 192 370 100,0030 51,6130 100 / 50
SE50 245 - - 50,0003 50
L3 (Ref L2/L4), L6(Ref L5/L7):
Class Name Width(um) Space(um) DIFF Theoretical Value SE Theoretical Value Target Value
DIFF90 146 184 89,9930 50,0050 90 / 50
DIFF100 146 650 99,6540 50,0050 100 / 50
SE50 146 - - 50,0050 50
The manufacturer where I'm going to manufacture the PCB (VI CLASS) has a minimum width/space track (external layer) for 35um of 15mm and a minimum width/space track (internal layer) for 35um of 12.5mm. --> This paragraph is worng.
The manufacturer where I'm going to manufacture the PCB (VI CLASS) has a minimum width/space track (external layer) of 0.15mm (for 35um Cu) and a minimum width/space track (internal layer) of 0.125mm (for 35um).
What do you think about my geometry?
Do you think it can be right?
Best regards.
I'm starting with the impedance calculations. I made everything with Saturn PCB design. And this is my result PCB stack up and track geometry - 8 layer.png I think the calculations are ok, but obviously I'm not completely sure. These are me calculations for DIFF90, DIFF100 and DIFF50.
L1 (Ref L2), L8 (Ref L7):
Class Name Width(um) Space(um) DIFF Theoretical Value SE Theoretical Value Target Value
DIFF90 203 213 89,9840 49,9670 90 / 50
DIFF100 192 370 100,0030 51,6130 100 / 50
SE50 245 - - 50,0003 50
L3 (Ref L2/L4), L6(Ref L5/L7):
Class Name Width(um) Space(um) DIFF Theoretical Value SE Theoretical Value Target Value
DIFF90 146 184 89,9930 50,0050 90 / 50
DIFF100 146 650 99,6540 50,0050 100 / 50
SE50 146 - - 50,0050 50
The manufacturer where I'm going to manufacture the PCB (VI CLASS) has a minimum width/space track (external layer) for 35um of 15mm and a minimum width/space track (internal layer) for 35um of 12.5mm. --> This paragraph is worng.
The manufacturer where I'm going to manufacture the PCB (VI CLASS) has a minimum width/space track (external layer) of 0.15mm (for 35um Cu) and a minimum width/space track (internal layer) of 0.125mm (for 35um).
What do you think about my geometry?
Do you think it can be right?
Best regards.
Comment