Hi,
For setting the design rules in Altium,
1.How to calculate the minimum & maximum trace Gap on each layer when the preferred trace width is provided by the PCB manufacturer?
2.How to calculate the trace width & Gap on the layers L2 & L11 (consider a 12 Layer PCB, L1-3-Signal,L4(GND),L5-L8(PWR),L9(GND),L10-L12 Signals) when the PCB manufacturer is not provided impedance calculation for the layers L2 & L11? Normally PCB manufacturers used to give the impedance calculated values only for routing layers, but here L2 & L11 is used for fanout requirement.
Thanks,
Anish
For setting the design rules in Altium,
1.How to calculate the minimum & maximum trace Gap on each layer when the preferred trace width is provided by the PCB manufacturer?
2.How to calculate the trace width & Gap on the layers L2 & L11 (consider a 12 Layer PCB, L1-3-Signal,L4(GND),L5-L8(PWR),L9(GND),L10-L12 Signals) when the PCB manufacturer is not provided impedance calculation for the layers L2 & L11? Normally PCB manufacturers used to give the impedance calculated values only for routing layers, but here L2 & L11 is used for fanout requirement.
Thanks,
Anish
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