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Placing a copper area in DDR 3 signal layers

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  • Placing a copper area in DDR 3 signal layers

    Hi All,

    As shown in attached figure, I intend to use a copper area (polygon to save copper) on DDR3 signal layer. The layout is closely based around IMX6 Rex. So according to your view what is effect of using the copper area (I am using it in all layers) on the layers which have high speed signals ? Should that copper area essentially need to be grounded ? What if it's left unconnected to any net ?

    Thanks in Advance

  • #2
    I recommend you to ground the copper fill and leave a clearance of 0.5 mm to the tracks, so that it doesn't affect their impedance. Floating copper fill is normally not doing any good.

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    • #3
      I never do this. There is absolutely no reason why to do it, I believe it has no benefit to the layout (you should have a solid GND above or under the memory tracks) and if it's improperly done, maybe it can make the layout even worse (for example I am not really sure how improperly grounded slivers are going to behave, how it is going to influence current flow and as mairomaster explained, I am not sure how this may influence track impedance)

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      • #4
        Thanks for your replies gentleman. So what you're suggesting is to remove the copper areas from those high speed layers and to have 2 solid ground layers adjacent to it (DDR traces) instead right ? Is it the main reason why Imx6-Rex design has fewer (short routes for via connections) in signal layer 2 and 11 (DDR traces go in layer 3 and 10 while two solid ground planes act as layer 4 and 9) ?

        See attachment, this shows L11.
        So except those via connections, the rest is grounded. What if we have two-three signal routes of let's say 4-5 mm in those L2/L11 layers ? will it adversely affect the performance ?

        So why layer 2 and 11 were not made solid planes ?

        cheers !
        Attached Files

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        • #5
          Is it the main reason why Imx6-Rex design has fewer (short routes for via connections) in signal layer 2 and 11 (DDR traces go in layer 3 and 10 while two solid ground planes act as layer 4 and 9) ?
          - Ideally I would like to leave 2 and 11 without tracks, however due technological limitations during PCB manufacturing, I had to put there short tracks. The reason for short trucks is, that if I would like to use uVIAs connecting L1 to L3 directly, the uVIAs would need to be have much bigger hole and that would not help me much. I needed small uVIAs. To get more information, search for "via aspect ratio", but basically, deeper you drill, bigger hole you need to use.

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          • #6
            in some cases it is wise to add the copper though. if you have only those tracks on that layer and the rest has no tracks. it could be helpfull for copper balancing.. this way the manufacturer can control his impedance matching better.. but it all depends on what you need. I agree with robert that i rarely use it. but if not balanced properly the board has more bow and twist.

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            • #7
              Thanks all for your suggestions, one specific question ! robertferanec : is it wise to use very few power line traces (of a certain length) in those layer 2 and 11 while having the larger GND copper area ? if yes what would be the ideal distance from such a trace to that GND area ? i.e. see this figure, the blue color area is GND, and the right illustrates the zoomed trace.

              Click image for larger version

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              cheers !

              Attached Files

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              • #8
                I never break GND planes (the small tracks are special exception and I keep them very small). I always have dedicated power layer, if needed I place some powers on signal layers.

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