Dear All,
I am using an FPGA device with over 361 pins. I have routed these pins but I am not sure if I should tent all vias under the FPGA both in TOP and BOTTOM layers so to avoid shorts or other reliability problems during soldering or assembly of PCB. Additionally I am not quite sure if a solder mask expansion value of 3 mil for vias under FPGA is adequate ?
Further how do you indicate with Altium that the via should be filled ?
Under what conditions or When I should tent the vias?
Thanks for your help and guidelines.
Regards,
Clive
I am using an FPGA device with over 361 pins. I have routed these pins but I am not sure if I should tent all vias under the FPGA both in TOP and BOTTOM layers so to avoid shorts or other reliability problems during soldering or assembly of PCB. Additionally I am not quite sure if a solder mask expansion value of 3 mil for vias under FPGA is adequate ?
Further how do you indicate with Altium that the via should be filled ?
Under what conditions or When I should tent the vias?
Thanks for your help and guidelines.
Regards,
Clive
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