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Problem with polygon and component

saeednowroozi , 05-16-2018, 07:14 AM
Hi,
I designed a board with smd and dip component and covered the entire surface with polygons(GND). Now I do not want to be inside a polygon. Is there a way?
alferdvidal , 05-19-2018, 05:07 AM
Hi,saeednwroozi
I did not understand you well. If you can explain more, I can help you
saeednowroozi , 05-19-2018, 11:53 AM
Hi alferdvidal,
want to avoid entering polygons in some parts of the environment when I draw a polygon. Inside the photo, I showed resistors for this. A polygon should not be created between the resistance pads.I hope, well explained.
robertferanec , 05-21-2018, 10:42 AM
I never draw GND polygon on my signal layers (you really need to understand what you are doing, otherwise it can make your layout worse - especially EMC/EMI properties of the layout), so I am not sure how other people do it. But, I believe, if you do not want GND flow between component pads, you may need to add keepout area into the footprint under your component.
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