GND Issues

[Dacarte]

Hi Robert,

Unfortunately I carried DRC violations whilst completing the PCB design. Please see the attached images of my design so far.

It is clear the GNDs are not connected but I don't understand why. There is probably something really simple missing. Please note I changed the colour for connection of the GNDs much later in the design. This may have caused the issue. I didn't follow your video absolutely which was my mistake.

I have two different layers for GNDs in my PCB but in the schematic the same GND symbol was used for all the GND connections. This has further confused me. Should the vias for the GNDs be going all the way through the board from the top to the bottom and connecting to both GND planes? You state in the videos that there are two seperate grounds. I am not sure what I have done.

Please note I am using Altium 2018 (18.1.9) which looks quite different for some of the menus so it is also quite likely I got one of the settings wrong.

Any help you can provide would be most appreciated.

Thank you.

Regards,

Dale

[mohsin_qau]

Is there Split Plane in the GND plane? If there is a splt plane, then double click on the split plane and check the connectivity.
Other way, Check in the setting of planes that you connect this plane with GND Net.

Its seem that the Plane is not connected with GND Net.

[Dacarte]

I can't see how to change the Plane allocation. In Robert's example this was done in the Layer Stack Manager. My Layer Stack Manager doesn't have that function. I don't know where else to find it....

[robertferanec]

mohsin_qau is probably right - looks like plane may not have GND assigned. Have a look here https://www.fedevel.com/academy/updates/ especially: https://www.fedevel.com/welldoneblog...e-new-old-way/

[Dacarte]

Following the additional videos I have been able to assign a GND to each of the planes. Are the vias suppose to go all the way through the board and connect to both GND planes? I am slightly confused by this. Please correct me if I am wrong but the same GND net is used for all components and planes in the SMPS tutorial. I now have crosses detailed on all of my GNDs and I am not sure what this is symbolising. My errors for no net connection for the GNDs has gone from 27 to 3.

[robertferanec]

Yes, the through hole VIAs used in that design are made the way, that the whole PCB is drilled through and PCB is then plated (plating is process when copper is put inside the VIAs) - means, yes, the two planes are connected.

[Dacarte]

Thank you Robert, I was confused mostly because I hadn't defined the planes at the beginning. Now defined I have been able to go through and assign some the polygons to different layers. This has got rid of all the errors.

The crosses on the vias seem to be something to do with thermal relief. I will see if I can find the right setting to get rid of this.

Cheers,

Dale

[Paul van Avesaath]

you should leave the thermal reliefs in there if possible.. it helps with manufacturing.. it keeps the plane from pulling all the heat out of the pin which could result in a bad solder joint.

[robertferanec]

The crosses on the vias seem to be something to do with thermal relief.

- cross means, that VIA is connected to plane