I am designing one board with DisplayPort V1.3
The maximum Data rate is 8.1Gbps.
Line coding: 8B/10B
I am designing a super speed board very first time. so, i have some of confusions which i want to solve.
(1)Which differential pair routing technique is good.Tight coupled or loose coupled?
(2)Should i use high-frequency dielectric material for this board like Roger material?
(3)Generally when we need high freq material like Rogers in our design.
(4)How to minimize impedance discontinuty,Reflection and signal degradation at Gold fingers like DIMM and DisplayPort Connector? (5)As VESA DP v1.3 standard they recommended adding an AC coupling capacitor of 100nF for the differential line. As per my understanding, this capacitor must have low ESR as well as low ESL. Please give some guidelines to select an AC coupling capacitor for super-speed lines. Should i use Cermaic capacitor with reverse geometry.
(6)How to manage High frequency harmonics in this board.Eg if I am working on 8.1Gbps then my fundamental freq will be 4.05GHz and it third harmonics will be 12.15Ghz and fifth harmonic will 20.25Ghz and the same as seventh and ninth harmonics.How to manage this harmonics. The confusion here is if i lose higher harmonics then I will also lose the sharpness of signal. What to do for this
(7)How to route differential pairs if it is not possible to route it straight.How to reverse this kind of super speed differential pairs.
(8)Consideration for layer stack-up design for super-speed board.
At last please share some documents for Superspeed boards layout guidelines.
The maximum Data rate is 8.1Gbps.
Line coding: 8B/10B
I am designing a super speed board very first time. so, i have some of confusions which i want to solve.
(1)Which differential pair routing technique is good.Tight coupled or loose coupled?
(2)Should i use high-frequency dielectric material for this board like Roger material?
(3)Generally when we need high freq material like Rogers in our design.
(4)How to minimize impedance discontinuty,Reflection and signal degradation at Gold fingers like DIMM and DisplayPort Connector? (5)As VESA DP v1.3 standard they recommended adding an AC coupling capacitor of 100nF for the differential line. As per my understanding, this capacitor must have low ESR as well as low ESL. Please give some guidelines to select an AC coupling capacitor for super-speed lines. Should i use Cermaic capacitor with reverse geometry.
(6)How to manage High frequency harmonics in this board.Eg if I am working on 8.1Gbps then my fundamental freq will be 4.05GHz and it third harmonics will be 12.15Ghz and fifth harmonic will 20.25Ghz and the same as seventh and ninth harmonics.How to manage this harmonics. The confusion here is if i lose higher harmonics then I will also lose the sharpness of signal. What to do for this
(7)How to route differential pairs if it is not possible to route it straight.How to reverse this kind of super speed differential pairs.
(8)Consideration for layer stack-up design for super-speed board.
At last please share some documents for Superspeed boards layout guidelines.
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