Layout for DisplayPort 8.1Gbps board

[robertferanec]

In that case, I would just find a chip with the interface. For example I googled for "DisplayPort 8.1Gbps chip" and found:

TI HD3SS214 8.1 Gbps DisplayPort 1.4 2:1/1:2 Differential Switch
http://www.ti.com/lit/ds/slas907b/slas907b.pdf

They have some layout recommendations in datasheet, maybe that can help? Possibly, keep searching and you may find more answers on your questions.

[Abhi P Choksi]

Hi Robert,

below is an overlook of the board.
Board doesn't contain any Superspeed chip. There is one Display Port connector and there are Gold Fingers. So its kind of DIMM module which has only Connector and Gold fingers. There are also some other ICs that are working at low speed. High-speed Diff signals are straight forward in this which is a connection from connector to Gold fingers and there is high-speed ESD protection diode in between them.

As I have a confidentiality problem so, I would not be able to share the schematic.
There is no reference design guides or documentation I have for this.

Another worst thing is that we don't have any High-Speed simulation facility so, this board must work in the first go.

It would be better if you can help with my questions.

[robertferanec]

Please, what is the chip? Do they have reference design or design guide?

These are very good questions and I would like to have a closer look at this topics if they have some info in documentation.

[Abhi P Choksi]

I am designing one board with DisplayPort V1.3
The maximum Data rate is 8.1Gbps.
Line coding: 8B/10B

I am designing a super speed board very first time. so, i have some of confusions which i want to solve.
(1)Which differential pair routing technique is good.Tight coupled or loose coupled?
(2)Should i use high-frequency dielectric material for this board like Roger material?
(3)Generally when we need high freq material like Rogers in our design.
(4)How to minimize impedance discontinuty,Reflection and signal degradation at Gold fingers like DIMM and DisplayPort Connector? (5)As VESA DP v1.3 standard they recommended adding an AC coupling capacitor of 100nF for the differential line. As per my understanding, this capacitor must have low ESR as well as low ESL. Please give some guidelines to select an AC coupling capacitor for super-speed lines. Should i use Cermaic capacitor with reverse geometry.
(6)How to manage High frequency harmonics in this board.Eg if I am working on 8.1Gbps then my fundamental freq will be 4.05GHz and it third harmonics will be 12.15Ghz and fifth harmonic will 20.25Ghz and the same as seventh and ninth harmonics.How to manage this harmonics. The confusion here is if i lose higher harmonics then I will also lose the sharpness of signal. What to do for this
(7)How to route differential pairs if it is not possible to route it straight.How to reverse this kind of super speed differential pairs.
(8)Consideration for layer stack-up design for super-speed board.

At last please share some documents for Superspeed boards layout guidelines.