Keeping only one differential impedance on one layer or not?

[mulfycrowh]

Hi everyone,

I have already met stackups, for example 12 layers, having 4 different differential impedances on 4 different layers.
it is convenient for impedance control but for motherboards it is not very easy to achieve due to the high density.
What do you think?

[Paul van Avesaath]

it depends mostly on what dept of BGA you need.. i have done very big FPGA's on 12 layer.. with a signal/gnd/signal/gnd stackup.. you need the GND/POWER planes to help with the impedance yes, but also to avoid crosstalk.. if you go sig/plane/sig/sig/plane you really need to avoid parrallel lines in your design

and like always, if it was easy everybody would do it.. so to answer you question.. it is defenitly possible to design a motheboard with multiple impedances on a 12 layer board. but i would need a but more infiormation about your specific case to have a fitting answer.

[mulfycrowh]

I meant: it is difficult to have just one dif. impedance on one layer.
You can have for example S50, D90 and D100.
Right?
I am asking because I recently met a manufacturer saying:
You provided Altium stackup with impedances but we don't know which layer is assigned to D90 or whatever.
He was the only one to ask this.

[Paul van Avesaath]

ah well you need to specify the reference layer of that impedance..
for examplele i have a mechanical layer for each impedance and highlight the signal that have the impedance.


but nowadays you can do in the layerstack with your impedance tab it automatically references the first layer above and below.


but there are some cases you can have a reference layer a bit further in your layerstack to get a good impedance / track width to make it work. then you can reference for instance a plane that is further up or down in you layerstack (mind that you really have add cutouts in the planes to comply with that reference!)

hope this helps.

[robertferanec]

1) often we create a picture of each layer where we highlight tracks with specific impedance. For example, you highlight all DIFF90 on Layer 3 and take screenshot. Then you highlight all DIFF100 tracks on Layer 3 and take screenshot, etc. These pictures are then attached to the manufacturing outputs and PCB manufacturer can easily identify what tracks are what impedance. I suspect they need this when they are tweaking stackup and they have to adjust track width of impedance controlled tracks.

2) as Paul van Avesaath pointed out, maybe there is no clear reference plane for your differential pairs? Track with controlled impedance often need to have a solid GND (or sometimes PWR) planes under and/or above them.

There is no problem having number of different impedances on the same layer. However in some design I did try to minimize number of them e.g. very often you may go with DIFF90 and DIFF100 only.