Us of DDR3 for iMX6

[millensg]

Hi Robert/Electronic Designer Community,

I am modifying an existing iMX6 Design to fit my own requirements, and it uses 2 x (2GB DDR3-1600) memory. Where I am re-laying out the board, I am considering using 4 chips instead of 2, although you can only have a maximum of 4GB for iMX6.

When providing a layout for 4 Memory chips do they ALL need to be populated with a memory component? i.e. provide 2x1GB or 4x1GB depending on the options/variant. This might give me flexibility regarding cost or EMC/development if certain chips are readily available.

[robertferanec]

It may depend on layout. We have boards (TinyRex module using T-branch, OpenRex board using Fly-by) where 4 or 2 memories can be fitted. Of course, you need to keep the "un-populated stubs" as short as possible and it is not the optimum memory layout, but we did extensive testing for TinyRex and it works oki. We have done also a lot of testing on OpenRex and we are just planning to go to Environmental chamber and EMC lab, but it also looks good. If it helps you, have a look at OpenRex layout. You can download full Altium project here: http://www.imx6rex.com/open-rex/

PS: You may want to be careful about how you place the two memories which will be always fitted. For T-branch we placed them on the top, for Fly-by we placed them on the end.

[millensg]

It will be a T Branch with the two chips on the top that will always be fitted. I have left space underneath for two more chips and associated cap/resistors. The only concern I have is that the original design had the memory routed from one corner of one side of the iMX6 chip (for only 2 chips mounted topside), whereas this should be split for top layer as it looks like the top and its bottom chip, for each pair, have very similar routings. I guess I will have to learn IOMUX.exe

[robertferanec]

Yes, that was the tricky part (32 bits in corner of the CPU), but it's doable (to route these for TOP chips).