MPC8308 DDR2 Signal integrity issue

[[email protected]]

Hi Robert,
i am using MPC8308 freescale processor and in DDR2 Signal integrity i am facing some issues and find the attached waveform and schematics for the same and kindly let me know what could be the problem.



Regards,
Venkatesh N

[robertferanec]

[email protected] I am very sorry, I can not do PCB and Schematic reviews. It would take me a lot of time and I would not be able to do the things which I have to do.

BTW, how did you do placement and routed ddr2 signals - the way as we recommended?

[[email protected]]

Hi Robert,
Thanks for your replay,
yes i have done the placement and routing as per the discussion what we had previously.



Regards,
venkatesh N

[robertferanec]

[email protected] would it be possible to attach some screenshots from your placement and layout (just the memory area)?

[[email protected]]

Hi Robert,
find the attached screen shots.


Regards,
venkatesh N

[robertferanec]

[email protected] it looks similar as your original placement. If I remember right, we suggested something a little bit different:

Maybe we would try to do it this way - see the attached picture. However, I am not saying that this is the way you should do it nor that it is the best way to do it. It is just an initial idea.

Try to move the termination resistor very close to the VIA (which is placed between the 3 devices) and simulate the net again. Also, in my opinion, the data signals may be too long.

[[email protected]]

Hi Robert,
I tried by moving the VTT resistors very close to VIA then also i am not able get the good waveform and i tried by removing VTT and placed series termination resistors then i got the waveforms looks better compared with previous when VTT resistors were present, kindly check the attached waveforms and give me your valuable suggestions.

Regards,
Venkatesh N

[robertferanec]

[email protected] I am sure you can handle it. It is not a very high frequency, you should not have problems. Double check your IBIS models, drivers, settings, impedance, stackup, pin properties ... there may be a lot of things what may need attention. Let us know when you figure it out.

[[email protected]]

Thanku very much for Quick replay and kind support,
i have one more clarification in the waveforms attached,
the waveform which is coming from the processor U12 has got less settle time compared to other waveforms can u please check and let me know what best we can do.

[robertferanec]

[email protected] it's very hard to comment the waveforms - it can be million things. Also, many times, waveforms on outputs don't look good (but it is not important), important are the waveforms on the inputs. Just from waveforms it is very hard to say what may not be set or done correctly.

[[email protected]]

Hi Robert,
Refering to to above discussion about Signal integrity of MPC8308 i have following clarification,
1) For DDR2 i have considered same frequency for both Address and data i.e 266MHZ later i realized i simulated once again only Address and command signals @133MHZ and i got the waveform attached in post, i observed some signal ringing kindly have a look in that and let me know valuable suggestions.


Regards,
venkatesh N
9620547065