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Test Points in High Speed Designs

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  • Test Points in High Speed Designs

    Hi,

    my question is is it possibly to add Test Points to High Speed Interfaces like LVDS without to change the impedance of the tracks.

    I would like to use these Test Points to measure signal integrity on this interface LVDS (Eye-Pattern).

    Have someone do have experience on doing this?

    Thanks for help!

  • #2
    I've used test points on 800 MHz LPDDR3 signals - no problem. If you want to be safe, use smaller test points (1 mm for example) and place them symmetrically, close to the differential pair to reduce stub length.

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    • #3
      The problem is the capacitance that the test poits creates when power/gnd its under it

      Try with ~12mil diameter pads over the track

      As mairomaster said, the electrical lenght from SoC to both testpoints should be the same

      Why dont open the vias mask at the receiver?

      Please tell us Interface parameters, speed etc...

      King regards!



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      • #4
        Also, it is very important to mention, that to measure high speed signals you may need an expensive equipment. If you are using a standard scope, just touching the signal with normal probe will change the signal waveform. If you do not have access to this expensive equipment (scope and probes), then the test points may not be used.

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        • #5
          This Week a Guy from an Spanish House that rents Scopes by days (~280€/day for a LeCroy 3GHZ Scope) told me that the Differential Probes Cost 12K€

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          • #6
            Yes, I think we were using probes which cost 5-6K ... you had to be quite careful do not damage them ... think twice, measure once

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