via-in-pad technology (BGA 0.5 mm pitch)

[KingVita89]

Hello,

I wonder if it is really necessary to use via-in-pad technology for decoupling capacitors?

In the BGA layout recommendation it is done like in picture below.

I know that Robert is not a friend of using vias in pad due to many reasons (e.g. production issues).

Can anybody please give an advice if I should use in my design via-in-pad technology like recommended by BGA manufacturer or I can vary from this technic?

What are the "extra cost" I have to pay more for via-in-pad technology, because as far as I know vias have to be filled and capped?

If I place the decoupling capacitors in a way that I don't need via-in-pad technology could be there maybe problems with FPGA in this BGA package?

Also I am not sure why in reference design (see picture) they placed via that close to BGA pad?
I normally would place via in the middle of surrounding BGA pads.


Thanks a lot!

[KingVita89]

Nobody who can give some information?

[mairomaster]

If you can achieve the routing without the use of vias in pad, go for it. It shouldn't cause any problems as long as you are not making any sacrifices because of that.

Sometimes it is not possible though, due to the small pitch of the device.
With the provided example you will need to use micro vias, so you shouldn't worry about filling/capping them - that is mostly relevant to TH vias I believe. Even if not, the manufacturer should be smart enough to notice if it will be a problem.

[robertferanec]

I agree with mairomaster. If possible I try to avoid VIAs in PADs, however, for very small chips you may need to use them. I always recommend, check how they have done it on the reference board, that may help.

[KingVita89]

Thanks for replying!

In reference board as far I see they use via in pad through hole capped and filled.

Also the track width of BGA fan out is very small 3 mil between pads changing to 4 mil. Very advanced PCB technology with fine structure track I even do not know who can manufactured such a PCB.

Also not sure why they placed Vias so close to pad of BGA if think that is very difficult to manufacture at least expensive.

Any other possibility to fan out that kind of BGA?

[robertferanec]

Yes, if you need so small BGA, than you may need expensive PCB. Maybe re-consider if you really need to use this footprint.

3 mil track is ok. Down to 75um (3mil) many good PCB manufactures can do it. Below 75um it is problem. Also, if you only have this critical track in one location in your PCB, even more standard PCB manufacturer may be able sometimes to manufacture it.

If possible, I would also place the VIA outside of BGA PAD for better and easier soldering (the hole is not directly in the pad, so it may not be so critical for perfect pad finishing). VIA in pad of smd capacitor is not so critical as VIA in BGA pad - even imperfect pad finishing in smt capacitor pad may be just fine.

Did you try to use through hole VIAs with 0.15mm (6mil) hole? Are they still too big?

[KingVita89]

"Yes, if you need so small BGA, than you may need expensive PCB. Maybe re-consider if you really need to use this footprint."

unfortunately this BGA is needed

"3 mil track is ok. Down to 75um (3mil) many good PCB manufactures can do it. Below 75um it is problem. Also, if you only have this critical track in one location in your PCB, even more standard PCB manufacturer may be able sometimes to manufacture it."

I know you use eXception PCB manufacturer or SQP International. Do you have any documents for min track width, via size etc. so I can check if they can do it.

Otherwise I would maybe use Wuerth Electronic a german manufacturer:




"If possible, I would also place the VIA outside of BGA PAD for better and easier soldering (the hole is not directly in the pad, so it may not be so critical for perfect pad finishing). VIA in pad of smd capacitor is not so critical as VIA in BGA pad - even imperfect pad finishing in smt capacitor pad may be just fine."

you are right via in BGA pad is more critical and not necessary in this pitch as they even not did it in reference design.

"Did you try to use through hole VIAs with 0.15mm (6mil) hole? Are they still too big?"

yes that fits. In reference design they use 5.9 mil PTH from Top to Bottom.


What would you prefer BGA fan out like in reference design with PTH without microvia and burried via ?

I think if just consider signal integrity for e.g. 100 Z it will be better to route with microvia from top to L1 and then routh diff pair inside PCB.

But for smd capacitor on bottom layer it is only possible with PTH Via in pad to do that.

What do you think about my idea?

[robertferanec]

- Exception can do 75um, I often use it. I dont think SQP can do them.

- I always prefer PTH for power pins

- I do not know what the BGA is, but it looks to me like signals are in the first two rows (should not be a problem for DIFF pairs, as I can see it on the ref board) and power is in the middle (should not be problem for PTH). The reference board seems to me correctly done, I would follow them.