PWR split plane as reference layer

[milos.stankovic]

Hi everyone!

I am designing 4L board with classical stackup:
L1 - TOP - routing layer
L2 - GND plane layer
L3 - Split PWR layer - there are several power supplies: 3V, 5V, USB_5V, Vdd_5V
L4 - BOT - routing layer

For minimal crosstalk it would be perfect when all tracks could be routed on TOP layer (L1) since there is solid GND plane on L2. However, routing all tracks on TOP is impossible so BOT layer (L4) needs to be used also. The problem is that there are few power supply voltages and L3 needs to be split. PWR plane is reference plane for signals on BOT layer provided that PWR plane is solid (only one voltage) and that there are sufficient bypass capacitors between GND plane and PWR plane. In my case PWR plane is split between several voltages and providing return path for high frequency currents can be accomplished using techniques described in Henry Ott's article (http://www.hottconsultants.com/techt...tack-up-6.html).
Is there some other way to make solid design without increasing number of layers?



Best regards,
Miloš

[robertferanec]

If you have concerns and PCB is small, use 6 layers (there should not be a big difference in price). If PCB is large, I would try to form the L3 power planes the way, that they are as large as possible, maybe I would move some parts of the powers on the TOP or bottom layer (?)