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A question about lvds routing and bga escaping

otutay , 01-21-2020, 11:20 PM
Hi all,
I watched the advance pcb layout course and try to route an fpga base board. In my board, i have 80 lvds pairs per two banks of fpga. I have little bit confused about bga escape and differential length matching. In order to escape from bga, i need to use different layers of the board. however Robert insists on using the same topology of the board (like same num of vias and same length on the each layer.). I think i cannot reach these two at the same time while escaping. What should i do?
Thanks in advance.
Osman
robertferanec , 01-22-2020, 01:10 AM
You can use different layers, just be careful and you need to know what you are doing. E.g. be careful about stackup (so properties on different layers are the same), be careful about total length, group the signals correctly and if possible route them the same way. We occasionally do route signals from same group on different layers, but as I said, we are extra careful in those cases.

When using FPGA you may have flexibility to adjust some parameters in software - so even if you find out there is a problem with specific signal, you may be able to tweak it in some pin settings.
otutay , 01-22-2020, 01:58 PM
Hi Robert, Thank you for your response. Can you be more specific with "E.g. be careful about stack-up (so properties on different layers are the same)"? I guess, you are talking about the trace resistance. I will set the trace resistance around 100 ohm since these are differential pairs. Is there anything i forgot?
And i m also quite suspicious about the propagation speed of a signal in different layers since these also have tremendous effect on signal integrity over the bus.How can i be sure about the propagation speed of a signal in different layers?
robertferanec , 01-24-2020, 12:38 AM
Yes, it is a lot about propagation speed.

So if you route signals in the same environment, even if they are routed on different layers, it still may be ok. However if the layers will have different properties, the things may get complicated (e.g. if layers will have different ER between different layers where you route the signals). That is why I said you may need to be careful about stackup.
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