Layout. Layer stack manager

[krishnaprasad mb]

tanku for your concern sir

[robertferanec]

There are more ways how to do it:
- using channels and rooms: you will need to google for this, maybe something like this: https://youtu.be/dYgvRCrVeOI
- I do not use channels, so I made a video how to do it without channels: https://www.youtube.com/watch?v=wgdCJ1rbNnA

[krishnaprasad mb]

hi sir,
i have a doubt about identical placement of component.i have 6 set of similer componets assosiated with 6 similer ic s.my doubt id how to place these 6 set identically with one set completly done.after one set complet ,i want automatically place identicaaly other 5 set.any methode is available sir

[Shesh]

Thank you so much

[robertferanec]

If you place a Rohs Compliance logo on your PCB, be sure the whole board meets the requirements: Components, Soldering, PCB all are Rohs complaint.

If you are asking only about PCB specifically, then your PCB should be ok, (ENIG is nickel-gold, so no lead).

[Shesh]

Hi Robert,
I am one of your follower and i need your help regarding placing word "RohS Compiance" on silk screen .

My PCB manufacturing specification are as follows

1.MAterial-FR4

2.Surface finish-ENIG

3.Silk screen -White

4.Solder mask-Green.

Please help ,Can put the same work on slink screen or i have to do any thing else to do so?

Kindly reply.Looking forward to hear you soon.

Thank You

Sheshnath Chauhan

Contact number-+918750834600

[robertferanec]

I have not created any video on this topic yet.

[krishnaprasad mb]

sir , any tutorial or step by step procedure available for multi board project.i want to separate one gate driver pcb above the power pcb.can u help me

[krishnaprasad mb]

Tanku sir.i am identified the error.this is comming from a special case.librery is converted from imported PAD s pcb. Then pcb ibrary components has aaditional copper layer created automatically that was created error.additional layer is deleted from pcb libry editor.then problem solved.tanku sir

[robertferanec]

that looks to me like you have a copper over pad and the copper and pad are connected to different nets. try to double click on the copper and double check where it is connected, also try to repur the copper plane (polygon) so it will correctly connect to the pads (go to Tools -> Polygon Pours - Repour All).

[krishnaprasad mb]

Sir previous error resolved by changing the rigid flex to printed electronics. Now i have other prblm while checking the DRC errors. 429 errors found in clearence constrains regarding pad and region. I can t solve this.

[robertferanec]

Could you attach screenshot from your layer stack manager? There should not be a problem to add new layers. PS: this is in older Altium, but still can help: https://welldoneblog.fedevel.com/201...e-new-old-way/ Possibly download our open source project and have a look how more layers are added: https://www.imx6rex.com/

[krishnaprasad mb]

How to create 6 layers.?. FR4 material is not availbale for additional layers dielectric. How to resolve error in top left corner of layer stack manager?please give me a topic for layer stack manager.give me guidline for design power pcb. Upto 200 amps.any idea