-
It is explained later in the course. This may also help with explanation: https://resources.altium.com/p/how-t...nd-cpu-fan-outLeave a comment:
-
Advance Layout Course (Lesson 2) Memory Signals
Hello everyone,
In the Advance layout course (Lesson 2), I would like to ask that:
Why did mr.Robert make some memory signal in the cpu a through-hole via and some of them a uVia ? why? is it better if we did a uVia for all the signals?
Example:
DRAM_D[0..7] are uVia.
DRAM_D[17..23] are through-hole Via.
- You have to register before you can post. To keep this forum out of spammers, every registration is manually approved.
- If you know answers on any questions on this forum, please feel free to answer them. (PS: I try to answer at least once a week or when possible, - Robert)
Leave a comment: