Length Matching (Layout Advance Course) APLC 6

[tariq1996]

YES, it worked.
Thanks mr.Robert

[robertferanec]

- Ah, I just noticed, you mentioned "we can see the reset trace is too long!". Reset is independent (asynchronous) signal and doesn't really need to be length matched to anything.
- Hmm, try do not apply the rule on differential pair class, just individual signals. Maybe that is the problem?

[tariq1996]

- please, which signal?

address, command and control group. please, see the attached figure.

- please, which signals are you referring to?

The HDMI signals. see the attached figure please.

[robertferanec]

I have noticed that in the final design of the board, after I delete all the connections except one chip, the length has not being match as being taught.

- please, which signal?

why the rule of length matching with differential group (10mils) does not work?

- please, which signals are you referring to?

2) This may help: See how signals are travelling in your PCB https://youtu.be/ZyoqhJB_E9Q

3) just the HDMI high speed signals (HDMI DIFF + HDMI CLK)

[tariq1996]

Hello Robert again,
Regarding the next activite (4), I have multiple of questions:

1. I have set up the rule for the length matching within the differential pairs (5 mils) it worked perfectly, but, why the rule of length matching with differential group (10mils) does not work? (see figure)

2. If I did a big wave for length matching, is this going to affect the differential pairs routing in bad way? and what about the uncoupled length? and also, is this wave is going to change the impedance of the trace? if that is so, so, how can we maintain the impedance of the trace along with the length? " see the figure "

3. Do I need to length match all the hdmi net class within 10 mils ? or just the within hdmi group ? e.g. (I2C), (I2C_CON), (HDMI), (HDMI_HPD_CON), etc...

[tariq1996]

Hello Robert,

I have watched your method about length matching the address, command and control group which is the third activite. But, I have noticed that in the final design of the board, after I delete all the connections except one chip, the length has not being match as being taught. May I ask why ? " I have see the design guide, it said within +-25 mils, but we can see the reset trace is too long! "