StackUP Design

[electron]

Hi Robert,

I watched your video on YouTube published on 25 June 2020 ,regarding Application Note of Intel Altera FPGA.

I have question about StackUP In Figure 11. Of that application note.

Why they matched trace width of single ended & differential trace width ?

Is it necessary ? What's the reason behind it ?

Please see attached image of that figure.

[robertferanec]

Many times, differential pairs are just like two single ended tracks - just running opposite signals. So, when routing diff pairs, often you may want to follow the recommended single ended impedance (e,g, 50-55 OHMS) for negative and positive tracks, but together they should follow recommended differential pair impedance e.g. Differential 100 OHMS, Differential 90 OHMS, etc ... Is that answering your question?

[electron]

Oh, Yes.
That answered my question.
Good to know
Thanks Robert.

[electron]

Hi Robert,
Can you refer any documentation regarding this topic?
Do you follow this rule in your design practice?

[robertferanec]

yes, I try to have individual signals of differential pairs routed with 50OHM impedance (or close to it as it is not always possible). Maybe this can help: https://www.youtube.com/watch?v=QG0Apol-oj0

[electron]

Thank you Robert for your valuable time & info.