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PCB Layer Stackup

Arunprakaash6 , 08-08-2020, 07:34 AM
Hello Mr.Robert,

I am going to design 8 Layer PCB with FPGA and DDR3 RAM. Design consist of Ethernet, USB, SD Card, GPS interface and all are on top of the board. I need 4 signal layers and 2 power layers and 2 ground layers. I can't increase layers because client limitation is 8 layer only. So please give me good suggestion for Layer stack example.

As per now I have choose following stackup:
Signal - GND - Signal - Power - Power - Signal - GND - Signal
Lakshmi , 08-09-2020, 08:33 AM
Stackups for you, so you have more time for doing PCB layout. Hope this helps.Links:- Share your PCB stackups here: https://designhelp.fedevel.com/forum/test...
Arunprakaash6 , 08-09-2020, 08:55 AM
Thanks Lakshmi,

I have already watched that video. There will be 8-Layer stackup not available. So only I am asking here clear my doubt. Can you please tell me that following stackup is good or not.

Signal - GND - Signal - Power - Power - Signal - GND - Signal

And also give me some tips to build it better.
Lakshmi , 08-09-2020, 10:32 PM
Hi,
It could be
1.Signal
2.GND(Continuous)
3.Signal
4.Power
5.GND(Continuous)
6.Power&Signal
7.GND(Continuous)
8.Signal

Make sure to have a PWR plane and Ref(GND) plane next to each other.

There could be best than above mentioned.

You said you're going to use FPGA, It's always the first option to have a look at their reference design and see how they've done.
There is a lot of App note that goes through them. Especially look from your FPGA Vendor as it could help you more.

Thank you.
robertferanec , 08-12-2020, 06:44 AM
@Arunprakaash6 I do not use 8 layer stackup much - it is not as cheap as 6 layers and it is not as good as 10 layers. Especially the problem are power planes - for CPU boards or FPGA boards you may often need minimum 2 layers dedicated to power planes and that is difficult with 8 layer stackup. You can place them on layers L4 and L5 but then L4 and L5 may not be the best reference planes for signals on L3 and L6. The power planes on L4 and L5 will be probably broken into many smaller polygons and local power planes.
Arunprakaash6 , 08-21-2020, 06:09 AM
Thanks @robertferanec and Thanks @Lakshmi . I have explain it to the client and they have given approval for 10 layers. Now I am going for 10 layer PCB with following stackup:

L1 - Signal
L2 - GND
L3 - Signal
L4 - GND
L5 - Powers
L6 - Powers
L7 - GND
L8 - Signal
L9 - GND
L10 - Signal
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