Layout Review for a PCIE to USB3 converting board
Firasgany7 , 01-13-2021, 07:27 AM
Hi,
I'm designing a board that converts from PCI-E to USB3 through a USB host controller from VIALABS (VL805).
I attached the PDF of the schematic and the PCB.zip file that includes the layout.
I also included 6 images of the 6 layers of the layout.
I was hoping to get some feedback regarding the layout routing and if there is something that I should change.
main important high speed traces are USB3, PCIE.
I attached the stack-up for information about the impedances.
Thanks,
I'm designing a board that converts from PCI-E to USB3 through a USB host controller from VIALABS (VL805).
I attached the PDF of the schematic and the PCB.zip file that includes the layout.
I also included 6 images of the 6 layers of the layout.
I was hoping to get some feedback regarding the layout routing and if there is something that I should change.
main important high speed traces are USB3, PCIE.
I attached the stack-up for information about the impedances.
Thanks,
robertferanec , 01-18-2021, 01:37 AM
Is the impedance of the tracks correct? The USB signals on L1 seems to me routed super close to each other.
Comments:
Firasgany7, 01-18-2021, 04:51 AM
Hi Robert, the USB2 track Impedance is 85 ohm, and the distance between the USB2 tracks that are connected to L1 is ~10 mils. is that a problem? a previous board with the same routing for the USB2 tracks has already worked. now I only added the VL805 chip with all the extra connection it needs.what spacing between USB2 traces do you use? and can you provide me with a manual that sums up all the standard spacings that you use for each protocol?
robertferanec , 01-25-2021, 06:09 AM
I mean these tracks (see the picture below). USB track geometry (track width and gap) is always based on stackup - so it depends on what stackup you use.
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