Normally I always use a solid GND plane on "start layer + 1" and also on "end layer -1". If not possible, than there is not much to do - it still should work oki.
However, I would spread the tracks, there is a lot of space on that RED layer and there is unnecessary risk having crosstalk between that tracks.
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Hey Max
can you just swap layer 6 and layer 7? You say Layer 6 is GND plane, that would solve your question.
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If it's just JTAG, It should be fine but make sure you don't have any high-speed signal running on Layer 8.
Can you please mention your layer stack-up?
People don't often use 8 Layer stack-up instead they tend to use 10Layers as it gives more two-layer and can be helpful with more reference layers and price difference is not much with 8L vs 10L.
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Hello,
Thanks for your proposal, Lakshmi!
I, ve just attached a picture, where the traces in red color are on the bottom layer 8, and the two planes are on layer 7, where in light brown, is prwsented +5V planes, respectivly with blue color is prwsented +3.3V. On the pucture also the mix with the capacitors mentioned above, is also presented.
Thanks,
Max
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Decoupling capacitors between two power planes +3.3V and +5V
Hello all,
I have designed an 8 layer board, with mounted components on both sides. However, on the bottom signal layer a set of tracks (JTAG signals) is crossing the gap formed between +3.3V and +5V on layer 7.
Since we were in a hurry, I just added on both sides around the set (left and right) where it crosses the gap a mix of decoupling capacitors connected between +3.3V and +5V, in order to assure a return path for those signals. The closest GND plane is a solid plane on layer 6.
I am asking for some recommendations, also if someone has performed some simulations for a case like this, and what exactly this approach may cause to the operation of the PCB itself ?
Thanks,
Max!
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